Matt Arsenault add2e2ec8f R600/SI: Fix extra mov from legalizing 64-bit SALU ops. ... Check the register class of each operand individually to avoid an extra copy to a vgpr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204662 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-24 20:08:13 +00:00
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Analysis
Assembler
Bindings
Bitcode
BugPoint
CodeGen	R600/SI: Fix extra mov from legalizing 64-bit SALU ops.	2014-03-24 20:08:13 +00:00
DebugInfo	DebugInfo: Omit DW_AT_addr_base from skeletal type units.	2014-03-21 20:27:21 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC	[PowerPC] Generate little-endian object files	2014-03-24 18:16:09 +00:00
Object	Teach llvm-readobj to print human friendly description of reserved sections.	2014-03-24 05:00:34 +00:00
Other
TableGen
tools	Teach llvm-readobj to print human friendly description of reserved sections.	2014-03-24 05:00:34 +00:00
Transforms	Allow constant folding of ceil function whenever feasible	2014-03-24 04:36:06 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg	Refactor llvm/test/lit.cfg to use lit.util.which.	2014-03-21 17:31:35 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh