Juergen Ributzka add7c56be5 [FastISel][AArch64] Don't bail during simple GEP instruction selection. ... The generic FastISel code would bail, because it can't emit a sign-extend for AArch64. This copies the code over and uses AArch64 specific emit functions. This is not ideal and 'computeAddress' should handles this, so it can fold the address computation into the memory operation. I plan to clean up 'computeAddress' anyways, so I will add that in a future commit. Related to rdar://problem/18962471. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221923 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-13 20:50:44 +00:00
..
Analysis	AVX-512: SINT_TO_FP cost model and some bugfixes	2014-11-13 11:46:16 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[FastISel][AArch64] Don't bail during simple GEP instruction selection.	2014-11-13 20:50:44 +00:00
DebugInfo	Add an assert and a test that verify r221709's fix.	2014-11-13 03:20:23 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC
Object	Object, support both mach-o archive t.o.c file names	2014-11-12 01:37:45 +00:00
Other
SymbolRewriter
TableGen
tools	llvm-readobj: Print out address table when dumping COFF delay-import table	2014-11-13 03:22:54 +00:00
Transforms	Teach ScalarEvolution to sharpen range information.	2014-11-13 00:00:58 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile	OCAMLFLAGS can contain =, don't use = with sed	2014-11-13 09:29:30 +00:00
Makefile.tests
TestRunner.sh