llvm-6502/lib/Target/ARM/Disassembler
Jim Grosbach fb8989e640 ARM parsing and encoding of SBFX and UBFX.
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:09:25 +00:00
..
ARMDisassembler.cpp Fix typo in the comment. 2011-04-19 23:58:52 +00:00
ARMDisassembler.h Better error handling of invalid IT mask '0000', instead of just asserting. 2010-04-19 23:02:58 +00:00
ARMDisassemblerCore.cpp ARM parsing and encoding of SBFX and UBFX. 2011-07-27 21:09:25 +00:00
ARMDisassemblerCore.h Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits. 2011-07-21 23:38:37 +00:00
CMakeLists.txt Clean up a pile of hacks in our CMake build relating to TableGen. 2011-07-26 00:09:08 +00:00
Makefile Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 2010-04-07 20:53:12 +00:00
ThumbDisassemblerCore.h ARM parsing and encoding of SBFX and UBFX. 2011-07-27 21:09:25 +00:00