llvm-6502/lib/Target/Mips
Evan Cheng 73f50d9bc3 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 18:32:37 +00:00
..
TargetInfo
CMakeLists.txt Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
Makefile Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
Mips.h Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
Mips.td
MipsAsmPrinter.cpp
MipsCallingConv.td Add A0 and A1 to the list of registers used for returning a value in order to 2011-06-21 01:28:11 +00:00
MipsDelaySlotFiller.cpp
MipsEmitGPRestore.cpp
MipsExpandPseudo.cpp
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td
MipsISelDAGToDAG.cpp Prevent generation of redundant addiu instructions that compute address of 2011-06-24 17:55:19 +00:00
MipsISelLowering.cpp Change the chain input of nodes that load the address of a function. This change 2011-06-24 19:01:25 +00:00
MipsISelLowering.h
MipsMachineFunction.h
MipsMCAsmInfo.cpp
MipsMCAsmInfo.h
MipsRegisterInfo.cpp Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
MipsRegisterInfo.h Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 2011-06-27 18:32:37 +00:00
MipsRegisterInfo.td
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h