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Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
204 lines
6.3 KiB
C++
204 lines
6.3 KiB
C++
//===-- ARMSubtarget.cpp - ARM Subtarget Information ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ARM specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMSubtarget.h"
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#include "ARMBaseInstrInfo.h"
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#include "ARMBaseRegisterInfo.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "ARMGenSubtargetInfo.inc"
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using namespace llvm;
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static cl::opt<bool>
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ReserveR9("arm-reserve-r9", cl::Hidden,
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cl::desc("Reserve R9, making it unavailable as GPR"));
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static cl::opt<bool>
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DarwinUseMOVT("arm-darwin-use-movt", cl::init(true), cl::Hidden);
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static cl::opt<bool>
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UseFusedMulOps("arm-use-mulops",
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cl::init(true), cl::Hidden);
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static cl::opt<bool>
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StrictAlign("arm-strict-align", cl::Hidden,
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cl::desc("Disallow all unaligned memory accesses"));
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ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS)
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: ARMGenSubtargetInfo(TT, CPU, FS)
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, ARMProcFamily(Others)
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, HasV4TOps(false)
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, HasV5TOps(false)
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, HasV5TEOps(false)
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, HasV6Ops(false)
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, HasV6T2Ops(false)
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, HasV7Ops(false)
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, HasVFPv2(false)
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, HasVFPv3(false)
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, HasVFPv4(false)
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, HasNEON(false)
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, UseNEONForSinglePrecisionFP(false)
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, UseMulOps(UseFusedMulOps)
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, SlowFPVMLx(false)
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, HasVMLxForwarding(false)
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, SlowFPBrcc(false)
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, InThumbMode(false)
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, HasThumb2(false)
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, IsMClass(false)
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, NoARM(false)
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, PostRAScheduler(false)
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, IsR9Reserved(ReserveR9)
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, UseMovt(false)
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, SupportsTailCall(false)
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, HasFP16(false)
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, HasD16(false)
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, HasHardwareDivide(false)
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, HasHardwareDivideInARM(false)
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, HasT2ExtractPack(false)
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, HasDataBarrier(false)
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, Pref32BitThumb(false)
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, AvoidCPSRPartialUpdate(false)
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, HasRAS(false)
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, HasMPExtension(false)
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, FPOnlySP(false)
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, AllowsUnalignedMem(false)
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, Thumb2DSP(false)
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, stackAlignment(4)
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, CPUString(CPU)
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, TargetTriple(TT)
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, TargetABI(ARM_ABI_APCS) {
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// Determine default and user specified characteristics
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if (CPUString.empty())
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CPUString = "generic";
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// Insert the architecture feature derived from the target triple into the
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// feature string. This is important for setting features that are implied
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// based on the architecture version.
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std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPUString);
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if (!FS.empty()) {
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if (!ArchFS.empty())
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ArchFS = ArchFS + "," + FS;
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else
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ArchFS = FS;
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}
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ParseSubtargetFeatures(CPUString, ArchFS);
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// Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a
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// ARM version or CPU and then remove this.
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if (!HasV6T2Ops && hasThumb2())
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HasV4TOps = HasV5TOps = HasV5TEOps = HasV6Ops = HasV6T2Ops = true;
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// Keep a pointer to static instruction cost data for the specified CPU.
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SchedModel = getSchedModelForCPU(CPUString);
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// Initialize scheduling itinerary for the specified CPU.
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InstrItins = getInstrItineraryForCPU(CPUString);
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if ((TT.find("eabi") != std::string::npos) || (isTargetIOS() && isMClass()))
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// FIXME: We might want to separate AAPCS and EABI. Some systems, e.g.
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// Darwin-EABI conforms to AACPS but not the rest of EABI.
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TargetABI = ARM_ABI_AAPCS;
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if (isAAPCS_ABI())
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stackAlignment = 8;
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if (!isTargetIOS())
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UseMovt = hasV6T2Ops();
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else {
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IsR9Reserved = ReserveR9 | !HasV6Ops;
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UseMovt = DarwinUseMOVT && hasV6T2Ops();
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SupportsTailCall = !getTargetTriple().isOSVersionLT(5, 0);
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}
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if (!isThumb() || hasThumb2())
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PostRAScheduler = true;
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// v6+ may or may not support unaligned mem access depending on the system
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// configuration.
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if (!StrictAlign && hasV6Ops() && isTargetDarwin())
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AllowsUnalignedMem = true;
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}
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/// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
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bool
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ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
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Reloc::Model RelocM) const {
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if (RelocM == Reloc::Static)
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return false;
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// Materializable GVs (in JIT lazy compilation mode) do not require an extra
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// load from stub.
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bool isDecl = GV->hasAvailableExternallyLinkage();
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if (GV->isDeclaration() && !GV->isMaterializable())
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isDecl = true;
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if (!isTargetDarwin()) {
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// Extra load is needed for all externally visible.
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if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
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return false;
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return true;
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} else {
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if (RelocM == Reloc::PIC_) {
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// If this is a strong reference to a definition, it is definitely not
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// through a stub.
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if (!isDecl && !GV->isWeakForLinker())
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return false;
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// Unless we have a symbol with hidden visibility, we have to go through a
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// normal $non_lazy_ptr stub because this symbol might be resolved late.
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if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
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return true;
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// If symbol visibility is hidden, we have a stub for common symbol
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// references and external declarations.
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if (isDecl || GV->hasCommonLinkage())
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// Hidden $non_lazy_ptr reference.
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return true;
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return false;
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} else {
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// If this is a strong reference to a definition, it is definitely not
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// through a stub.
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if (!isDecl && !GV->isWeakForLinker())
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return false;
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// Unless we have a symbol with hidden visibility, we have to go through a
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// normal $non_lazy_ptr stub because this symbol might be resolved late.
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if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
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return true;
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}
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}
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return false;
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}
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unsigned ARMSubtarget::getMispredictionPenalty() const {
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return SchedModel->MispredictPenalty;
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}
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bool ARMSubtarget::enablePostRAScheduler(
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CodeGenOpt::Level OptLevel,
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TargetSubtargetInfo::AntiDepBreakMode& Mode,
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RegClassVector& CriticalPathRCs) const {
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Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
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CriticalPathRCs.clear();
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CriticalPathRCs.push_back(&ARM::GPRRegClass);
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return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
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}
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