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A more complete example of the bug in PR16556 was recently provided, showing that the previous fix was not sufficient. The previous fix is reverted herein. The real problem is that ReplaceNodeResults() uses LowerFP_TO_INT as custom lowering for FP_TO_SINT during type legalization, without checking whether the input type is handled by that routine. LowerFP_TO_INT requires the input to be f32 or f64, so we fail when the input is ppcf128. I'm leaving the test case from the initial fix (r185821) in place, and adding the new test as another crash-only check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185959 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.8 KiB
LLVM
42 lines
1.8 KiB
LLVM
; RUN: llc < %s
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; This test formerly failed because of wrong custom lowering for
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; fptosi of ppc_fp128.
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target datalayout = "E-p:32:32:32-S0-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:64:128-v64:64:64-v128:128:128-a0:0:64-n32"
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target triple = "powerpc-unknown-linux-gnu"
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%core.time.TickDuration = type { i64 }
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@_D4core4time12TickDuration11ticksPerSecyl = global i64 0
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@.str5 = internal unnamed_addr constant [40 x i8] c"..\5Cldc\5Cruntime\5Cdruntime\5Csrc\5Ccore\5Ctime.d\00"
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@.str83 = internal constant [10 x i8] c"null this\00"
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@.modulefilename = internal constant { i32, i8* } { i32 39, i8* getelementptr inbounds ([40 x i8]* @.str5, i32 0, i32 0) }
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declare i8* @_d_assert_msg({ i32, i8* }, { i32, i8* }, i32)
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define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(%core.time.TickDuration* %.this_arg) {
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entry:
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%unitsPerSec = alloca i64, align 8
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%tmp = icmp ne %core.time.TickDuration* %.this_arg, null
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br i1 %tmp, label %noassert, label %assert
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assert: ; preds = %entry
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%tmp1 = load { i32, i8* }* @.modulefilename
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%0 = call i8* @_d_assert_msg({ i32, i8* } { i32 9, i8* getelementptr inbounds ([10 x i8]* @.str83, i32 0, i32 0) }, { i32, i8* } %tmp1, i32 1586)
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unreachable
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noassert: ; preds = %entry
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%tmp2 = getelementptr %core.time.TickDuration* %.this_arg, i32 0, i32 0
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%tmp3 = load i64* %tmp2
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%tmp4 = sitofp i64 %tmp3 to ppc_fp128
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%tmp5 = load i64* @_D4core4time12TickDuration11ticksPerSecyl
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%tmp6 = sitofp i64 %tmp5 to ppc_fp128
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%tmp7 = fdiv ppc_fp128 %tmp6, 0xM80000000000000000000000000000000
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%tmp8 = fdiv ppc_fp128 %tmp4, %tmp7
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%tmp9 = fptosi ppc_fp128 %tmp8 to i64
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ret i64 %tmp9
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}
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