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llvm-6502/test/CodeGen
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Michael Zolotukhin 6023ad2d37 LegalizeTypes: Handle shift by 0 in ExpandShiftByConstant. 
Though such shifts are usually optimized away by combiner, we still can
encounter them after a vector shift is legalized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 01:13:01 +00:00
..
AArch64 [AArch64] Teach AsmPrinter about GlobalAddress operands. 2015-03-05 20:04:21 +00:00
ARM [ARM] Enable vector extload combine for legal types. 2015-03-05 19:37:53 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC Use the correct func begin symbol in all places in ppc. 2015-03-05 19:47:50 +00:00
R600
SPARC
SystemZ
Thumb
Thumb2
WinEH Replace llvm.frameallocate with llvm.frameescape 2015-03-05 18:26:34 +00:00
X86 LegalizeTypes: Handle shift by 0 in ExpandShiftByConstant. 2015-03-06 01:13:01 +00:00
XCore