llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-14 00:32:55 +00:00

History

Juergen Ributzka ae9a7964ef [FastISel][AArch64] Factor out ADDS/SUBS instruction emission and add support for extensions and shift folding.

Factor out the ADDS/SUBS instruction emission code into helper functions and
make the helper functions more clever to support most of the different ADDS/SUBS
instructions the architecture support. This includes better immedediate support,
shift folding, and sign-/zero-extend folding.

This fixes <rdar://problem/17913111>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216033 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-19 22:29:55 +00:00

Analysis

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Assembler

IR: Implement uselistorder assembly directives

2014-08-19 21:30:15 +00:00

Bindings

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Bitcode

verify-uselistorder: Force -preserve-bc-use-list-order

2014-08-19 21:08:27 +00:00

BugPoint