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https://github.com/c64scene-ar/llvm-6502.git
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981a010c09
(The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
911 B
LLVM
33 lines
911 B
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s -check-prefix=THUMBTWO
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; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
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define void @test1(i32* %ptr, i32 %val1) {
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; ARM: test1
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; ARM: dmb ish
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; ARM-NEXT: str
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; ARM-NEXT: dmb ish
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; THUMBONE: test1
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; THUMBONE: __sync_lock_test_and_set_4
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; THUMBTWO: test1
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; THUMBTWO: dmb ish
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; THUMBTWO-NEXT: str
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; THUMBTWO-NEXT: dmb ish
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store atomic i32 %val1, i32* %ptr seq_cst, align 4
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ret void
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}
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define i32 @test2(i32* %ptr) {
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; ARM: test2
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; ARM: ldr
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; ARM-NEXT: dmb ish
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; THUMBONE: test2
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; THUMBONE: __sync_val_compare_and_swap_4
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; THUMBTWO: test2
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; THUMBTWO: ldr
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; THUMBTWO-NEXT: dmb ish
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%val = load atomic i32* %ptr seq_cst, align 4
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ret i32 %val
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}
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