llvm-6502/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

58 lines
1.4 KiB
LLVM

; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
define <4 x i16> @a(i32* %x1) nounwind {
; CHECK-LABEL: a:
; CHECK: shrl %[[R:[^,]+]]
; CHECK-NEXT: movd %[[R]], %xmm0
; CHECK-NEXT: retl
%x2 = load i32, i32* %x1
%x3 = lshr i32 %x2, 1
%x = trunc i32 %x3 to i16
%r = insertelement <4 x i16> zeroinitializer, i16 %x, i32 0
ret <4 x i16> %r
}
define <8 x i16> @b(i32* %x1) nounwind {
; CHECK-LABEL: b:
; CHECK: shrl %e[[R:.]]x
; CHECK-NEXT: movzwl %[[R]]x, %e[[R]]x
; CHECK-NEXT: movd %e[[R]]x, %xmm0
; CHECK-NEXT: retl
%x2 = load i32, i32* %x1
%x3 = lshr i32 %x2, 1
%x = trunc i32 %x3 to i16
%r = insertelement <8 x i16> zeroinitializer, i16 %x, i32 0
ret <8 x i16> %r
}
define <8 x i8> @c(i32* %x1) nounwind {
; CHECK-LABEL: c:
; CHECK: shrl %e[[R:.]]x
; CHECK-NEXT: movzwl %[[R]]x, %e[[R]]x
; CHECK-NEXT: movd %e[[R]]x, %xmm0
; CHECK-NEXT: retl
%x2 = load i32, i32* %x1
%x3 = lshr i32 %x2, 1
%x = trunc i32 %x3 to i8
%r = insertelement <8 x i8> zeroinitializer, i8 %x, i32 0
ret <8 x i8> %r
}
define <16 x i8> @d(i32* %x1) nounwind {
; CHECK-LABEL: d:
; CHECK: shrl %e[[R:.]]x
; CHECK-NEXT: movzbl %[[R]]l, %e[[R]]x
; CHECK-NEXT: movd %e[[R]]x, %xmm0
; CHECK-NEXT: retl
%x2 = load i32, i32* %x1
%x3 = lshr i32 %x2, 1
%x = trunc i32 %x3 to i8
%r = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0
ret <16 x i8> %r
}