mirror of
https://github.com/c64scene-ar/llvm-6502.git
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e1af5f6ad1
Utilizing the 8 and 16 bit comparison instructions, even when an input can be folded into the comparison instruction itself, is typically not worth it. There are too many partial register stalls as a result, leading to significant slowdowns. By always performing comparisons on at least 32-bit registers, performance of the calculation chain leading to the comparison improves. Continue to use the smaller comparisons when minimizing size, as that allows better folding of loads into the comparison instructions. rdar://15386341 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195496 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
2.8 KiB
LLVM
97 lines
2.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=64BIT
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; rdar://7329206
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; In 32-bit the partial register stall would degrade performance.
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define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
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entry:
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; 32BIT-LABEL: t1:
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; 32BIT: movw 20(%esp), %ax
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; 32BIT-NOT: movw %ax, %cx
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; 32BIT: leal 1(%eax), %ecx
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; 64BIT-LABEL: t1:
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; 64BIT-NOT: movw %si, %ax
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; 64BIT: leal 1(%rsi), %eax
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%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
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%1 = add i16 %k, 1 ; <i16> [#uses=3]
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br i1 %0, label %bb, label %bb1
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bb: ; preds = %entry
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tail call void @foo(i16 zeroext %1) nounwind
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ret i16 %1
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bb1: ; preds = %entry
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ret i16 %1
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}
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define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
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entry:
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; 32BIT-LABEL: t2:
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; 32BIT: movw 20(%esp), %ax
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; 32BIT-NOT: movw %ax, %cx
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; 32BIT: leal -1(%eax), %ecx
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; 64BIT-LABEL: t2:
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; 64BIT-NOT: movw %si, %ax
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; 64BIT: leal -1(%rsi), %eax
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; 64BIT: movzwl %ax
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%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
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%1 = add i16 %k, -1 ; <i16> [#uses=3]
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br i1 %0, label %bb, label %bb1
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bb: ; preds = %entry
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tail call void @foo(i16 zeroext %1) nounwind
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ret i16 %1
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bb1: ; preds = %entry
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ret i16 %1
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}
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declare void @foo(i16 zeroext)
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define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
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entry:
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; 32BIT-LABEL: t3:
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; 32BIT: movw 20(%esp), %ax
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; 32BIT-NOT: movw %ax, %cx
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; 32BIT: leal 2(%eax), %ecx
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; 64BIT-LABEL: t3:
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; 64BIT-NOT: movw %si, %ax
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; 64BIT: leal 2(%rsi), %eax
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%0 = add i16 %k, 2 ; <i16> [#uses=3]
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%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
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br i1 %1, label %bb, label %bb1
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bb: ; preds = %entry
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tail call void @foo(i16 zeroext %0) nounwind
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ret i16 %0
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bb1: ; preds = %entry
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ret i16 %0
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}
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define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
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entry:
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; 32BIT-LABEL: t4:
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; 32BIT: movw 16(%esp), %ax
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; 32BIT: movw 20(%esp), %cx
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; 32BIT-NOT: movw %cx, %dx
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; 32BIT: leal (%ecx,%eax), %edx
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; 64BIT-LABEL: t4:
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; 64BIT-NOT: movw %si, %ax
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; 64BIT: leal (%rsi,%rdi), %eax
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%0 = add i16 %k, %c ; <i16> [#uses=3]
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%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
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br i1 %1, label %bb, label %bb1
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bb: ; preds = %entry
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tail call void @foo(i16 zeroext %0) nounwind
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ret i16 %0
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bb1: ; preds = %entry
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ret i16 %0
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}
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