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https://github.com/c64scene-ar/llvm-6502.git
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5c8b83eb7a
The logic for expanding atomics that aren't natively supported in terms of cmpxchg loops is much simpler to express at the IR level. It also allows the normal optimisations and CodeGen improvements to help out with atomics, instead of using a limited set of possible instructions.. rdar://problem/13496295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212119 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.5 KiB
LLVM
60 lines
1.5 KiB
LLVM
; RUN: llc -march=x86 -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
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; RUN: llc -march=x86 -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
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@sc64 = external global i64
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define void @atomic_maxmin_i6432() {
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; LINUX: atomic_maxmin_i6432
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%1 = atomicrmw max i64* @sc64, i64 5 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: seta
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: jne [[LABEL]]
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%2 = atomicrmw min i64* @sc64, i64 6 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: setb
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: jne [[LABEL]]
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%3 = atomicrmw umax i64* @sc64, i64 7 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: seta
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: jne [[LABEL]]
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%4 = atomicrmw umin i64* @sc64, i64 8 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: setb
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: jne [[LABEL]]
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ret void
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}
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; rdar://12453106
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@id = internal global i64 0, align 8
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define void @tf_bug(i8* %ptr) nounwind {
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; PIC-LABEL: tf_bug:
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; PIC-DAG: movl _id-L1$pb(
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; PIC-DAG: movl (_id-L1$pb)+4(
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%tmp1 = atomicrmw add i64* @id, i64 1 seq_cst
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%tmp2 = add i64 %tmp1, 1
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%tmp3 = bitcast i8* %ptr to i64*
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store i64 %tmp2, i64* %tmp3, align 4
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ret void
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}
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