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11d77223a5
Another case of x86-specific shuffle strength reduction: avoid generating insert*128 instructions with index 0 because they are slower than their non-lane-changing blend equivalents. Shuffle lowering already catches most of these cases, but the zero vector case and some other paths such as in the modified test in vector-shuffle-256-v32.ll were getting through. Differential Revision: http://reviews.llvm.org/D8366 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232773 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.1 KiB
LLVM
103 lines
3.1 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
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; Prefer a blend instruction to a vinsert128 instruction because blends
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; are simpler (no lane changes) and therefore will have equal or better
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; performance.
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define <8 x float> @castA(<4 x float> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castA:
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; AVX1: vxorps %ymm1, %ymm1, %ymm1
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; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: castA:
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; AVX2: vxorps %ymm1, %ymm1, %ymm1
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; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; AVX2-NEXT: retq
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entry:
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%shuffle.i = shufflevector <4 x float> %m, <4 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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ret <8 x float> %shuffle.i
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}
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define <4 x double> @castB(<2 x double> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castB:
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; AVX1: vxorpd %ymm1, %ymm1, %ymm1
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; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: castB:
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; AVX2: vxorpd %ymm1, %ymm1, %ymm1
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; AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
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; AVX2-NEXT: retq
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entry:
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%shuffle.i = shufflevector <2 x double> %m, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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ret <4 x double> %shuffle.i
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}
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; AVX2 is needed for integer types.
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define <4 x i64> @castC(<2 x i64> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castC:
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; AVX1: vxorps %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: castC:
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; AVX2: vpxor %ymm1, %ymm1, %ymm1
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; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; AVX2-NEXT: retq
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entry:
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%shuffle.i = shufflevector <2 x i64> %m, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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ret <4 x i64> %shuffle.i
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}
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; The next three tests don't need any shuffling. There may or may not be a
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; vzeroupper before the return, so just check for the absence of shuffles.
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define <4 x float> @castD(<8 x float> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castD:
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; AVX1-NOT: extract
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; AVX1-NOT: blend
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;
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; AVX2-LABEL: castD:
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; AVX2-NOT: extract
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; AVX2-NOT: blend
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entry:
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%shuffle.i = shufflevector <8 x float> %m, <8 x float> %m, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x float> %shuffle.i
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}
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define <2 x i64> @castE(<4 x i64> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castE:
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; AVX1-NOT: extract
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; AVX1-NOT: blend
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;
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; AVX2-LABEL: castE:
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; AVX2-NOT: extract
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; AVX2-NOT: blend
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entry:
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%shuffle.i = shufflevector <4 x i64> %m, <4 x i64> %m, <2 x i32> <i32 0, i32 1>
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ret <2 x i64> %shuffle.i
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}
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define <2 x double> @castF(<4 x double> %m) nounwind uwtable readnone ssp {
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; AVX1-LABEL: castF:
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; AVX1-NOT: extract
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; AVX1-NOT: blend
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;
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; AVX2-LABEL: castF:
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; AVX2-NOT: extract
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; AVX2-NOT: blend
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entry:
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%shuffle.i = shufflevector <4 x double> %m, <4 x double> %m, <2 x i32> <i32 0, i32 1>
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ret <2 x double> %shuffle.i
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}
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