mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 02:29:22 +00:00
da5e5688e9
The target-independent selection algorithm in FastISel already knows how to select a SINT_TO_FP if the target is SSE but not AVX. On targets that have SSE but not AVX, the tablegen'd 'fastEmit' functions for ISD::SINT_TO_FP know how to select instruction X86::CVTSI2SSrr (for an i32 to f32 conversion) and X86::CVTSI2SDrr (for an i32 to f64 conversion). This patch simplifies the logic in method X86SelectSIToFP knowing that the code would not be reachable if the subtarget doesn't have AVX. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231243 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
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define double @int_to_double_rr(i32 %a) {
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; ALL-LABEL: int_to_double_rr:
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; SSE2: cvtsi2sdl %edi, %xmm0
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; AVX: vcvtsi2sdl %edi, %xmm0, %xmm0
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; ALL-NEXT: ret
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entry:
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%0 = sitofp i32 %a to double
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ret double %0
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}
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define double @int_to_double_rm(i32* %a) {
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; ALL-LABEL: int_to_double_rm:
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; SSE2: cvtsi2sdl (%rdi), %xmm0
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; AVX: vcvtsi2sdl (%rdi), %xmm0, %xmm0
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; ALL-NEXT: ret
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entry:
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%0 = load i32, i32* %a
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%1 = sitofp i32 %0 to double
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ret double %1
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}
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define float @int_to_float_rr(i32 %a) {
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; ALL-LABEL: int_to_float_rr:
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; SSE2: cvtsi2ssl %edi, %xmm0
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; AVX: vcvtsi2ssl %edi, %xmm0, %xmm0
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; ALL-NEXT: ret
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entry:
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%0 = sitofp i32 %a to float
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ret float %0
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}
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define float @int_to_float_rm(i32* %a) {
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; ALL-LABEL: int_to_float_rm:
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; SSE2: cvtsi2ssl (%rdi), %xmm0
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; AVX: vcvtsi2ssl (%rdi), %xmm0, %xmm0
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; ALL-NEXT: ret
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entry:
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%0 = load i32, i32* %a
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%1 = sitofp i32 %0 to float
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ret float %1
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}
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