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https://github.com/c64scene-ar/llvm-6502.git
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62ba058dea
This patch attempts to convert a SCALAR_TO_VECTOR using an operand from an EXTRACT_VECTOR_ELT into a VECTOR_SHUFFLE. This prevents many cases of spilling scalar data between the gpr + simd registers. At present the optimization only accepts cases where there is no TRUNC of the scalar type (i.e. all types must match). Differential Revision: http://reviews.llvm.org/D8132 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231554 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.5 KiB
LLVM
43 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s
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declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>)
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define <2 x i16> @good(<4 x i32>*, <4 x i8>*) {
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; CHECK-LABEL: good:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movdqa (%rdi), %xmm0
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; CHECK-NEXT: pminud {{.*}}(%rip), %xmm0
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; CHECK-NEXT: pmovzxwq %xmm0, %xmm0
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; CHECK-NEXT: retq
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entry:
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%2 = load <4 x i32>, <4 x i32>* %0, align 16
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%3 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%4 = extractelement <4 x i32> %3, i32 0
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%5 = extractelement <4 x i32> %3, i32 1
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%6 = extractelement <4 x i32> %3, i32 2
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%7 = extractelement <4 x i32> %3, i32 3
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%8 = bitcast i32 %4 to <2 x i16>
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%9 = bitcast i32 %5 to <2 x i16>
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ret <2 x i16> %8
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}
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define <2 x i16> @bad(<4 x i32>*, <4 x i8>*) {
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; CHECK-LABEL: bad:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movdqa (%rdi), %xmm0
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; CHECK-NEXT: pminud {{.*}}(%rip), %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; CHECK-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
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; CHECK-NEXT: retq
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entry:
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%2 = load <4 x i32>, <4 x i32>* %0, align 16
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%3 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%4 = extractelement <4 x i32> %3, i32 0
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%5 = extractelement <4 x i32> %3, i32 1
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%6 = extractelement <4 x i32> %3, i32 2
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%7 = extractelement <4 x i32> %3, i32 3
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%8 = bitcast i32 %4 to <2 x i16>
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%9 = bitcast i32 %5 to <2 x i16>
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ret <2 x i16> %9
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}
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