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https://github.com/c64scene-ar/llvm-6502.git
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fd115c47a2
- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG lowering where we need to check whether x is a vector type (in-reg type) of i8, i16 or i32; otherwise, that optimization is not valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195779 91177308-0d34-0410-b5e6-96231b3b80d8
11 lines
261 B
LLVM
11 lines
261 B
LLVM
; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=penryn | FileCheck %s
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define void @foo(<16 x i32>* %p, <16 x i1> %x) {
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%ret = sext <16 x i1> %x to <16 x i32>
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store <16 x i32> %ret, <16 x i32>* %p
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ret void
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; CHECK: foo
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; CHECK-NOT: pmovsxbd
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; CHECK: ret
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}
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