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e6cfdc8471
This patch adds support for a new builtin instruction called __builtin_ia32_rdpmc. Builtin '__builtin_ia32_rdpmc' is defined as a 'GCC builtin'; on X86, it can be used to read performance monitoring counters. It takes as input the index of the performance counter to read, and returns the value of the specified performance counter as a 64-bit number. Calls to this new builtin will map to instruction RDPMC. The index in input to the builtin call is moved to register %ECX. The result of the builtin call is the value of the specified performance counter (RDPMC would return that quantity in registers RDX:RAX). This patch: - Adds builtin int_x86_rdpmc as a GCCBuiltin; - Adds a new x86 DAG node called 'RDPMC_DAG'; - Teaches how to lower this new builtin; - Adds an ISel pattern to select instruction RDPMC; - Fixes the definition of instruction RDPMC adding %RAX and %RDX as implicit definitions, and adding %ECX as implicit use; - Adds a LLVM test to verify that the new builtin is correctly selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212049 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
577 B
LLVM
23 lines
577 B
LLVM
; RUN: llc < %s -march=x86-64 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64
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; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
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; Verify that we correctly lower the "Read Performance-Monitoring Counters"
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; x86 builtin.
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define i64 @test_builtin_read_pmc(i32 %ID) {
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%1 = tail call i64 @llvm.x86.rdpmc(i32 %ID)
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ret i64 %1
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}
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; CHECK-LABEL: test_builtin_read_pmc
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; CHECK: rdpmc
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; X86-NOT: shlq
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; X86-NOT: or
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; X86-64: shlq
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; X86-64: or
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; CHECK-NOT: mov
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; CHECK: ret
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declare i64 @llvm.x86.rdpmc(i32 %ID)
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