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https://github.com/c64scene-ar/llvm-6502.git
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00fb386b23
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228835 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.6 KiB
LLVM
46 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse | FileCheck %s
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; FNEG is defined as subtraction from -0.0.
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; This test verifies that we use an xor with a constant to flip the sign bits; no subtraction needed.
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define <4 x float> @t1(<4 x float> %Q) {
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; CHECK-LABEL: t1:
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; CHECK: xorps {{.*}}LCPI0_0{{.*}}, %xmm0
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; CHECK-NEXT: retq
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%tmp = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
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ret <4 x float> %tmp
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}
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; This test verifies that we generate an FP subtraction because "0.0 - x" is not an fneg.
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define <4 x float> @t2(<4 x float> %Q) {
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; CHECK-LABEL: t2:
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; CHECK: xorps %[[X:xmm[0-9]+]], %[[X]]
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; CHECK-NEXT: subps %xmm0, %[[X]]
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; CHECK-NEXT: movaps %[[X]], %xmm0
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; CHECK-NEXT: retq
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%tmp = fsub <4 x float> zeroinitializer, %Q
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ret <4 x float> %tmp
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}
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; If we're bitcasting an integer to an FP vector, we should avoid the FPU/vector unit entirely.
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; Make sure that we're flipping the sign bit and only the sign bit of each float.
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; So instead of something like this:
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; movd %rdi, %xmm0
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; xorps .LCPI2_0(%rip), %xmm0
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;
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; We should generate:
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; movabsq (put sign bit mask in integer register))
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; xorq (flip sign bits)
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; movd (move to xmm return register)
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define <2 x float> @fneg_bitcast(i64 %i) {
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; CHECK-LABEL: fneg_bitcast:
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; CHECK: movabsq $-9223372034707292160, %rax # imm = 0x8000000080000000
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: movd %rax, %xmm0
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; CHECK-NEXT: retq
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%bitcast = bitcast i64 %i to <2 x float>
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%fneg = fsub <2 x float> <float -0.0, float -0.0>, %bitcast
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ret <2 x float> %fneg
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}
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