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Though such shifts are usually optimized away by combiner, we still can encounter them after a vector shift is legalized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231443 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
276 B
LLVM
13 lines
276 B
LLVM
; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
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; Verify that we don't fail when shift by zero is encountered.
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define i64 @test1(<2 x i64> %a) {
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entry:
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%c = shl <2 x i64> %a, <i64 0, i64 2>
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%d = extractelement <2 x i64> %c, i32 0
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ret i64 %d
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}
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; CHECK-LABEL: test1
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