mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.5 KiB
LLVM
95 lines
2.5 KiB
LLVM
; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7-avx | FileCheck %s
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; RUN: opt -instsimplify -disable-output < %s
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;CHECK-LABEL: AGEP0:
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define <4 x i32*> @AGEP0(i32* %ptr) nounwind {
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entry:
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;CHECK-LABEL: AGEP0
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;CHECK: vbroadcast
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;CHECK-NEXT: vpaddd
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;CHECK-NEXT: ret
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%vecinit.i = insertelement <4 x i32*> undef, i32* %ptr, i32 0
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%vecinit2.i = insertelement <4 x i32*> %vecinit.i, i32* %ptr, i32 1
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%vecinit4.i = insertelement <4 x i32*> %vecinit2.i, i32* %ptr, i32 2
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%vecinit6.i = insertelement <4 x i32*> %vecinit4.i, i32* %ptr, i32 3
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%A2 = getelementptr i32, <4 x i32*> %vecinit6.i, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%A3 = getelementptr i32, <4 x i32*> %A2, <4 x i32> <i32 10, i32 14, i32 19, i32 233>
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ret <4 x i32*> %A3
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}
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;CHECK-LABEL: AGEP1:
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define i32 @AGEP1(<4 x i32*> %param) nounwind {
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entry:
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;CHECK-LABEL: AGEP1
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;CHECK: vpaddd
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;CHECK-NEXT: vpextrd
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;CHECK-NEXT: movl
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%k = extractelement <4 x i32*> %A2, i32 3
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%v = load i32, i32* %k
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ret i32 %v
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP2:
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define i32 @AGEP2(<4 x i32*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP2
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;CHECK: vpslld $2
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;CHECK-NEXT: vpadd
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> %off
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%k = extractelement <4 x i32*> %A2, i32 3
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%v = load i32, i32* %k
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ret i32 %v
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP3:
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define <4 x i32*> @AGEP3(<4 x i32*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP3
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;CHECK: vpslld $2
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;CHECK-NEXT: vpadd
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> %off
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%v = alloca i32
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%k = insertelement <4 x i32*> %A2, i32* %v, i32 3
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ret <4 x i32*> %k
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP4:
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define <4 x i16*> @AGEP4(<4 x i16*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP4
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; Multiply offset by two (add it to itself).
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;CHECK: vpadd
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; add the base to the offset
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;CHECK-NEXT: vpadd
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%A = getelementptr i16, <4 x i16*> %param, <4 x i32> %off
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ret <4 x i16*> %A
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP5:
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define <4 x i8*> @AGEP5(<4 x i8*> %param, <4 x i8> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP5
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;CHECK: vpaddd
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%A = getelementptr i8, <4 x i8*> %param, <4 x i8> %off
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ret <4 x i8*> %A
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;CHECK: ret
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}
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; The size of each element is 1 byte. No need to multiply by element size.
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;CHECK-LABEL: AGEP6:
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define <4 x i8*> @AGEP6(<4 x i8*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP6
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;CHECK-NOT: pslld
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%A = getelementptr i8, <4 x i8*> %param, <4 x i32> %off
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ret <4 x i8*> %A
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;CHECK: ret
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}
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