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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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define <4 x i32> @load_zmov_4i32_to_0zzz(<4 x i32> *%ptr) {
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; SSE-LABEL: load_zmov_4i32_to_0zzz:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: movd (%rdi), %xmm0
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; SSE-NEXT: retq
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; AVX-LABEL: load_zmov_4i32_to_0zzz:
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; AVX: # BB#0: # %entry
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; AVX-NEXT: vmovd (%rdi), %xmm0
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; AVX-NEXT: retq
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entry:
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%X = load <4 x i32>, <4 x i32>* %ptr
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%Y = shufflevector <4 x i32> %X, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
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ret <4 x i32>%Y
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}
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define <2 x i64> @load_zmov_2i64_to_0z(<2 x i64> *%ptr) {
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; SSE-LABEL: load_zmov_2i64_to_0z:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: movq (%rdi), %xmm0
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; SSE-NEXT: retq
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; AVX-LABEL: load_zmov_2i64_to_0z:
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; AVX: # BB#0: # %entry
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; AVX-NEXT: vmovq (%rdi), %xmm0
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; AVX-NEXT: retq
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entry:
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%X = load <2 x i64>, <2 x i64>* %ptr
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%Y = shufflevector <2 x i64> %X, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 2>
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ret <2 x i64>%Y
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}
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