mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 02:29:22 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
271 lines
6.4 KiB
LLVM
271 lines
6.4 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mattr=sse2 | FileCheck %s -check-prefix=SSE2
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; RUN: llc < %s -march=x86-64 -mattr=ssse3 | FileCheck %s -check-prefix=SSSE3
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; RUN: llc < %s -march=x86-64 -mattr=avx2 | FileCheck %s -check-prefix=AVX2
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; RUN: llc < %s -march=x86-64 -mattr=avx512f | FileCheck %s -check-prefix=AVX512
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define <4 x i32> @test1(<4 x i32> %a) nounwind {
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; SSE2-LABEL: test1:
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; SSE2: movdqa
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; SSE2: psrad $31
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; SSE2-NEXT: padd
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; SSE2-NEXT: pxor
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; SSE2-NEXT: ret
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; SSSE3-LABEL: test1:
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test1:
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; AVX2: vpabsd
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; AVX2-NEXT: ret
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; AVX512-LABEL: test1:
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; AVX512: vpabsd
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; AVX512-NEXT: ret
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%tmp1neg = sub <4 x i32> zeroinitializer, %a
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%b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>
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%abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg
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ret <4 x i32> %abs
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}
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define <4 x i32> @test2(<4 x i32> %a) nounwind {
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; SSE2-LABEL: test2:
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; SSE2: movdqa
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; SSE2: psrad $31
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; SSE2-NEXT: padd
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; SSE2-NEXT: pxor
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; SSE2-NEXT: ret
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; SSSE3-LABEL: test2:
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test2:
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; AVX2: vpabsd
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; AVX2-NEXT: ret
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; AVX512-LABEL: test2:
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; AVX512: vpabsd
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; AVX512-NEXT: ret
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%tmp1neg = sub <4 x i32> zeroinitializer, %a
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%b = icmp sge <4 x i32> %a, zeroinitializer
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%abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg
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ret <4 x i32> %abs
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}
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define <8 x i16> @test3(<8 x i16> %a) nounwind {
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; SSE2-LABEL: test3:
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; SSE2: movdqa
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; SSE2: psraw $15
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; SSE2-NEXT: padd
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; SSE2-NEXT: pxor
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; SSE2-NEXT: ret
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; SSSE3-LABEL: test3:
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; SSSE3: pabsw
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test3:
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; AVX2: vpabsw
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; AVX2-NEXT: ret
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; AVX512-LABEL: test3:
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; AVX512: vpabsw
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; AVX512-NEXT: ret
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%tmp1neg = sub <8 x i16> zeroinitializer, %a
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%b = icmp sgt <8 x i16> %a, zeroinitializer
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%abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg
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ret <8 x i16> %abs
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}
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define <16 x i8> @test4(<16 x i8> %a) nounwind {
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; SSE2-LABEL: test4:
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; SSE2: pxor
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; SSE2: pcmpgtb
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; SSE2-NEXT: padd
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; SSE2-NEXT: pxor
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; SSE2-NEXT: ret
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; SSSE3-LABEL: test4:
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; SSSE3: pabsb
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test4:
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; AVX2: vpabsb
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; AVX2-NEXT: ret
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; AVX512-LABEL: test4:
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; AVX512: vpabsb
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; AVX512-NEXT: ret
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%tmp1neg = sub <16 x i8> zeroinitializer, %a
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%b = icmp slt <16 x i8> %a, zeroinitializer
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%abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a
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ret <16 x i8> %abs
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}
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define <4 x i32> @test5(<4 x i32> %a) nounwind {
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; SSE2-LABEL: test5:
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; SSE2: movdqa
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; SSE2: psrad $31
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; SSE2-NEXT: padd
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; SSE2-NEXT: pxor
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; SSE2-NEXT: ret
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; SSSE3-LABEL: test5:
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test5:
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; AVX2: vpabsd
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; AVX2-NEXT: ret
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; AVX512-LABEL: test5:
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; AVX512: vpabsd
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; AVX512-NEXT: ret
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%tmp1neg = sub <4 x i32> zeroinitializer, %a
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%b = icmp sle <4 x i32> %a, zeroinitializer
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%abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a
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ret <4 x i32> %abs
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}
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define <8 x i32> @test6(<8 x i32> %a) nounwind {
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; SSSE3-LABEL: test6:
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; SSSE3: pabsd
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test6:
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; AVX2: vpabsd {{.*}}%ymm
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; AVX2-NEXT: ret
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; AVX512-LABEL: test6:
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; AVX512: vpabsd {{.*}}%ymm
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; AVX512-NEXT: ret
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%tmp1neg = sub <8 x i32> zeroinitializer, %a
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%b = icmp sgt <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg
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ret <8 x i32> %abs
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}
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define <8 x i32> @test7(<8 x i32> %a) nounwind {
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; SSSE3-LABEL: test7:
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; SSSE3: pabsd
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test7:
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; AVX2: vpabsd {{.*}}%ymm
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; AVX2-NEXT: ret
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; AVX512-LABEL: test7:
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; AVX512: vpabsd {{.*}}%ymm
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; AVX512-NEXT: ret
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%tmp1neg = sub <8 x i32> zeroinitializer, %a
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%b = icmp sge <8 x i32> %a, zeroinitializer
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%abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg
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ret <8 x i32> %abs
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}
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define <16 x i16> @test8(<16 x i16> %a) nounwind {
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; SSSE3-LABEL: test8:
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; SSSE3: pabsw
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; SSSE3: pabsw
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test8:
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; AVX2: vpabsw {{.*}}%ymm
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; AVX2-NEXT: ret
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; AVX512-LABEL: test8:
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; AVX512: vpabsw {{.*}}%ymm
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; AVX512-NEXT: ret
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%tmp1neg = sub <16 x i16> zeroinitializer, %a
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%b = icmp sgt <16 x i16> %a, zeroinitializer
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%abs = select <16 x i1> %b, <16 x i16> %a, <16 x i16> %tmp1neg
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ret <16 x i16> %abs
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}
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define <32 x i8> @test9(<32 x i8> %a) nounwind {
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; SSSE3-LABEL: test9:
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; SSSE3: pabsb
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; SSSE3: pabsb
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test9:
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; AVX2: vpabsb {{.*}}%ymm
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; AVX2-NEXT: ret
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; AVX512-LABEL: test9:
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; AVX512: vpabsb {{.*}}%ymm
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; AVX512-NEXT: ret
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%tmp1neg = sub <32 x i8> zeroinitializer, %a
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%b = icmp slt <32 x i8> %a, zeroinitializer
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%abs = select <32 x i1> %b, <32 x i8> %tmp1neg, <32 x i8> %a
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ret <32 x i8> %abs
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}
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define <8 x i32> @test10(<8 x i32> %a) nounwind {
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; SSSE3-LABEL: test10:
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; SSSE3: pabsd
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; SSSE3: pabsd
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; SSSE3-NEXT: ret
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; AVX2-LABEL: test10:
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; AVX2: vpabsd {{.*}}%ymm
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; AVX2-NEXT: ret
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; AVX512-LABEL: test10:
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; AVX512: vpabsd {{.*}}%ymm
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; AVX512-NEXT: ret
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%tmp1neg = sub <8 x i32> zeroinitializer, %a
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%b = icmp sle <8 x i32> %a, zeroinitializer
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%abs = select <8 x i1> %b, <8 x i32> %tmp1neg, <8 x i32> %a
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ret <8 x i32> %abs
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}
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define <16 x i32> @test11(<16 x i32> %a) nounwind {
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; AVX2-LABEL: test11:
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; AVX2: vpabsd
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; AVX2: vpabsd
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; AVX2-NEXT: ret
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; AVX512-LABEL: test11:
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; AVX512: vpabsd {{.*}}%zmm
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; AVX512-NEXT: ret
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%tmp1neg = sub <16 x i32> zeroinitializer, %a
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%b = icmp sle <16 x i32> %a, zeroinitializer
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%abs = select <16 x i1> %b, <16 x i32> %tmp1neg, <16 x i32> %a
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ret <16 x i32> %abs
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}
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define <8 x i64> @test12(<8 x i64> %a) nounwind {
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; AVX2-LABEL: test12:
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; AVX2: vpxor
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; AVX2: vpxor
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; AVX2-NEXT: ret
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; AVX512-LABEL: test12:
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; AVX512: vpabsq {{.*}}%zmm
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; AVX512-NEXT: ret
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%tmp1neg = sub <8 x i64> zeroinitializer, %a
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%b = icmp sle <8 x i64> %a, zeroinitializer
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%abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a
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ret <8 x i64> %abs
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}
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define <8 x i64> @test13(<8 x i64>* %a.ptr) nounwind {
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; AVX2-LABEL: test13:
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; AVX2: vpxor
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; AVX2: vpxor
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; AVX2-NEXT: ret
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; AVX512-LABEL: test13:
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; AVX512: vpabsq (%
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; AVX512-NEXT: ret
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%a = load <8 x i64>, <8 x i64>* %a.ptr, align 8
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%tmp1neg = sub <8 x i64> zeroinitializer, %a
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%b = icmp sle <8 x i64> %a, zeroinitializer
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%abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a
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ret <8 x i64> %abs
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}
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