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https://github.com/c64scene-ar/llvm-6502.git
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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
3.7 KiB
LLVM
101 lines
3.7 KiB
LLVM
; RUN: llvm-as < %s | opt -disable-output -scalar-evolution -analyze \
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; RUN: | grep { --> (sext i. \{.\*,+,.\*\}<bb1> to i64)} | count 5
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; Don't convert (sext {...,+,...}) to {sext(...),+,sext(...)} in cases
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; where the trip count is not within range.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @foo0(double* nocapture %x) nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
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%0 = trunc i64 %i.0.reg2mem.0 to i7 ; <i8> [#uses=1]
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%1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
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%2 = sext i9 %1 to i64 ; <i64> [#uses=1]
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%3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
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%4 = load double* %3, align 8 ; <double> [#uses=1]
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%5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
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%6 = sext i7 %0 to i64 ; <i64> [#uses=1]
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%7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
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store double %5, double* %7, align 8
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%8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
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%9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
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br i1 %9, label %return, label %bb1
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return: ; preds = %bb1
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ret void
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}
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define void @foo1(double* nocapture %x) nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
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%0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
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%1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
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%2 = sext i9 %1 to i64 ; <i64> [#uses=1]
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%3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
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%4 = load double* %3, align 8 ; <double> [#uses=1]
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%5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
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%6 = sext i8 %0 to i64 ; <i64> [#uses=1]
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%7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
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store double %5, double* %7, align 8
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%8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
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%9 = icmp sgt i64 %8, 128 ; <i1> [#uses=1]
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br i1 %9, label %return, label %bb1
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return: ; preds = %bb1
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ret void
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}
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define void @foo2(double* nocapture %x) nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i64 [ -129, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
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%0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
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%1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
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%2 = sext i9 %1 to i64 ; <i64> [#uses=1]
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%3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
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%4 = load double* %3, align 8 ; <double> [#uses=1]
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%5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
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%6 = sext i8 %0 to i64 ; <i64> [#uses=1]
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%7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
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store double %5, double* %7, align 8
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%8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
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%9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
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br i1 %9, label %return, label %bb1
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return: ; preds = %bb1
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ret void
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}
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define void @foo3(double* nocapture %x) nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
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%0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
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%1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
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%2 = sext i9 %1 to i64 ; <i64> [#uses=1]
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%3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
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%4 = load double* %3, align 8 ; <double> [#uses=1]
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%5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
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%6 = sext i8 %0 to i64 ; <i64> [#uses=1]
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%7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
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store double %5, double* %7, align 8
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%8 = add i64 %i.0.reg2mem.0, -1 ; <i64> [#uses=2]
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%9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
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br i1 %9, label %return, label %bb1
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return: ; preds = %bb1
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ret void
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}
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