mirror of
https://github.com/c64scene-ar/llvm-6502.git
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afe628c1d6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5050 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.5 KiB
C++
95 lines
2.5 KiB
C++
//===- Target/X86/X86RegisterClasses.cpp - Register Classes -------*-C++-*-===//
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//
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// This file describes the X86 Register Classes which describe registers.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/MRegisterInfo.h"
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#include "X86RegisterInfo.h"
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#include "llvm/Type.h"
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enum {
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#define R(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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namespace {
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const unsigned ByteRegClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R8(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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TargetRegisterClass X86ByteRegisterClassInstance(1, ByteRegClassRegs,
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ByteRegClassRegs+sizeof(ByteRegClassRegs)/sizeof(ByteRegClassRegs[0]));
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//
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//
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//
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const unsigned ShortRegClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R16(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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TargetRegisterClass X86ShortRegisterClassInstance(2, ShortRegClassRegs,
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ShortRegClassRegs+sizeof(ShortRegClassRegs)/sizeof(ShortRegClassRegs[0]));
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//
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//
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//
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const unsigned IntRegClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R32(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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TargetRegisterClass X86IntRegisterClassInstance(4, IntRegClassRegs,
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IntRegClassRegs+sizeof(IntRegClassRegs)/sizeof(IntRegClassRegs[0]));
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const TargetRegisterClass * const X86RegClasses[] = {
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&X86ByteRegisterClassInstance,
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&X86ShortRegisterClassInstance,
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&X86IntRegisterClassInstance
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};
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}
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const TargetRegisterClass* X86RegisterInfo::getRegClassForType(const Type* Ty)
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const {
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switch (Ty->getPrimitiveID()) {
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case Type::BoolTyID:
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case Type::SByteTyID:
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case Type::UByteTyID: return &X86ByteRegisterClassInstance;
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case Type::ShortTyID:
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case Type::UShortTyID: return &X86ShortRegisterClassInstance;
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case Type::LongTyID: // None of these are handled yet!
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case Type::ULongTyID: // FIXME: Treat these like ints, this is bogus!
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case Type::IntTyID:
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case Type::UIntTyID:
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case Type::PointerTyID: return &X86IntRegisterClassInstance;
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case Type::FloatTyID:
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case Type::DoubleTyID:
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default:
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assert(0 && "Invalid type to getClass!");
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return 0; // not reached
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}
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}
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MRegisterInfo::const_iterator X86RegisterInfo::regclass_begin() const {
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return X86RegClasses;
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}
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unsigned X86RegisterInfo::getNumRegClasses() const {
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return sizeof(X86RegClasses)/sizeof(X86RegClasses[0]);
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}
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MRegisterInfo::const_iterator X86RegisterInfo::regclass_end() const {
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return X86RegClasses+getNumRegClasses();
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}
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