mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7ee3ca10f5
This fixes PR5997. These transforms were disabled because codegen couldn't deal with other uses of trunc(x). This is now handled by the peephole pass. This causes no regressions on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159003 91177308-0d34-0410-b5e6-96231b3b80d8
121 lines
2.5 KiB
LLVM
121 lines
2.5 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; Instcombine should be able to eliminate all of these ext casts.
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declare void @use(i32)
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define i64 @test1(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 15
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%d = zext i32 %c to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK: @test1
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i64 @test2(i64 %a) {
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%b = trunc i64 %a to i32
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%c = shl i32 %b, 4
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%q = ashr i32 %c, 4
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%d = sext i32 %q to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK: @test2
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; CHECK: shl i64 %a, 36
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; CHECK: %d = ashr exact i64 {{.*}}, 36
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; CHECK: ret i64 %d
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}
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define i64 @test3(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 8
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%d = zext i32 %c to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK: @test3
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i64 @test4(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 8
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%x = xor i32 %c, 8
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%d = zext i32 %x to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK: @test4
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; CHECK: = and i64 %a, 8
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; CHECK: = xor i64 {{.*}}, 8
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i32 @test5(i32 %A) {
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%B = zext i32 %A to i128
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%C = lshr i128 %B, 16
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%D = trunc i128 %C to i32
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ret i32 %D
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; CHECK: @test5
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; CHECK: %C = lshr i32 %A, 16
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; CHECK: ret i32 %C
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}
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define i32 @test6(i64 %A) {
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%B = zext i64 %A to i128
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%C = lshr i128 %B, 32
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%D = trunc i128 %C to i32
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ret i32 %D
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; CHECK: @test6
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; CHECK: %C = lshr i64 %A, 32
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; CHECK: %D = trunc i64 %C to i32
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; CHECK: ret i32 %D
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}
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define i92 @test7(i64 %A) {
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%B = zext i64 %A to i128
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%C = lshr i128 %B, 32
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%D = trunc i128 %C to i92
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ret i92 %D
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; CHECK: @test7
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; CHECK: %B = zext i64 %A to i92
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; CHECK: %C = lshr i92 %B, 32
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; CHECK: ret i92 %C
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}
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define i64 @test8(i32 %A, i32 %B) {
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%tmp38 = zext i32 %A to i128
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%tmp32 = zext i32 %B to i128
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%tmp33 = shl i128 %tmp32, 32
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%ins35 = or i128 %tmp33, %tmp38
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%tmp42 = trunc i128 %ins35 to i64
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ret i64 %tmp42
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; CHECK: @test8
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; CHECK: %tmp38 = zext i32 %A to i64
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; CHECK: %tmp32 = zext i32 %B to i64
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; CHECK: %tmp33 = shl nuw i64 %tmp32, 32
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; CHECK: %ins35 = or i64 %tmp33, %tmp38
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; CHECK: ret i64 %ins35
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}
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define i8 @test9(i32 %X) {
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%Y = and i32 %X, 42
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%Z = trunc i32 %Y to i8
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ret i8 %Z
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; CHECK: @test9
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; CHECK: trunc
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; CHECK: and
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; CHECK: ret
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}
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; rdar://8808586
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define i8 @test10(i32 %X) {
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%Y = trunc i32 %X to i8
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%Z = and i8 %Y, 42
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ret i8 %Z
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; CHECK: @test10
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; CHECK: trunc
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; CHECK: and
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; CHECK: ret
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}
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