mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-02 11:30:10 +00:00
b05a8a8f02
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133814 91177308-0d34-0410-b5e6-96231b3b80d8
328 lines
7.5 KiB
LLVM
328 lines
7.5 KiB
LLVM
; RUN: llc < %s -march=ptx32 | FileCheck %s
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; preds
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; (note: we convert back to i32 to return)
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define ptx_device i32 @cvt_pred_i8(i8 %x, i1 %y) {
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; CHECK: setp.gt.b8 p[[P0:[0-9]+]], rq{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = trunc i8 %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) {
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; CHECK: setp.gt.b16 p[[P0:[0-9]+]], rh{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = trunc i16 %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) {
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; CHECK: setp.gt.b32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = trunc i32 %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) {
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; CHECK: setp.gt.b64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) {
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; CHECK: setp.gt.b32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = fptoui float %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) {
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; CHECK: setp.gt.b64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0
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; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
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; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
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; CHECK-NEXT: ret;
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%a = fptoui double %x to i1
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%b = and i1 %a, %y
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%c = zext i1 %b to i32
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ret i32 %c
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}
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; i8
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define ptx_device i8 @cvt_i8_preds(i1 %x) {
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; CHECK: selp.u8 rq{{[0-9]+}}, 1, 0, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i1 %x to i8
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ret i8 %a
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}
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define ptx_device i8 @cvt_i8_i32(i32 %x) {
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; CHECK: cvt.u8.u32 rq{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = trunc i32 %x to i8
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ret i8 %a
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}
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define ptx_device i8 @cvt_i8_i64(i64 %x) {
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; CHECK: cvt.u8.u64 rq{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i8
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ret i8 %a
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}
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define ptx_device i8 @cvt_i8_f32(float %x) {
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; CHECK: cvt.rzi.u8.f32 rq{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui float %x to i8
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ret i8 %a
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}
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define ptx_device i8 @cvt_i8_f64(double %x) {
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; CHECK: cvt.rzi.u8.f64 rq{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui double %x to i8
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ret i8 %a
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}
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; i16
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define ptx_device i16 @cvt_i16_preds(i1 %x) {
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; CHECK: selp.u16 rh{{[0-9]+}}, 1, 0, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i1 %x to i16
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ret i16 %a
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}
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define ptx_device i16 @cvt_i16_i8(i8 %x) {
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; CHECK: cvt.u16.u8 rh{{[0-9]+}}, rq{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i8 %x to i16
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ret i16 %a
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}
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define ptx_device i16 @cvt_i16_i32(i32 %x) {
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; CHECK: cvt.u16.u32 rh{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = trunc i32 %x to i16
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ret i16 %a
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}
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define ptx_device i16 @cvt_i16_i64(i64 %x) {
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; CHECK: cvt.u16.u64 rh{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i16
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ret i16 %a
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}
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define ptx_device i16 @cvt_i16_f32(float %x) {
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; CHECK: cvt.rzi.u16.f32 rh{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui float %x to i16
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ret i16 %a
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}
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define ptx_device i16 @cvt_i16_f64(double %x) {
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; CHECK: cvt.rzi.u16.f64 rh{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui double %x to i16
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ret i16 %a
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}
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; i32
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define ptx_device i32 @cvt_i32_preds(i1 %x) {
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; CHECK: selp.u32 r{{[0-9]+}}, 1, 0, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i1 %x to i32
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ret i32 %a
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}
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define ptx_device i32 @cvt_i32_i8(i8 %x) {
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; CHECK: cvt.u32.u8 r{{[0-9]+}}, rq{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i8 %x to i32
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ret i32 %a
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}
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define ptx_device i32 @cvt_i32_i16(i16 %x) {
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; CHECK: cvt.u32.u16 r{{[0-9]+}}, rh{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i16 %x to i32
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ret i32 %a
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}
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define ptx_device i32 @cvt_i32_i64(i64 %x) {
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; CHECK: cvt.u32.u64 r{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i32
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ret i32 %a
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}
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define ptx_device i32 @cvt_i32_f32(float %x) {
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; CHECK: cvt.rzi.u32.f32 r{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui float %x to i32
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ret i32 %a
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}
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define ptx_device i32 @cvt_i32_f64(double %x) {
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; CHECK: cvt.rzi.u32.f64 r{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui double %x to i32
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ret i32 %a
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}
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; i64
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define ptx_device i64 @cvt_i64_preds(i1 %x) {
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; CHECK: selp.u64 rd{{[0-9]+}}, 1, 0, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i1 %x to i64
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ret i64 %a
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}
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define ptx_device i64 @cvt_i64_i8(i8 %x) {
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; CHECK: cvt.u64.u8 rd{{[0-9]+}}, rq{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i8 %x to i64
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ret i64 %a
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}
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define ptx_device i64 @cvt_i64_i16(i16 %x) {
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; CHECK: cvt.u64.u16 rd{{[0-9]+}}, rh{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i16 %x to i64
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ret i64 %a
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}
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define ptx_device i64 @cvt_i64_i32(i32 %x) {
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; CHECK: cvt.u64.u32 rd{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = zext i32 %x to i64
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ret i64 %a
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}
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define ptx_device i64 @cvt_i64_f32(float %x) {
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; CHECK: cvt.rzi.u64.f32 rd{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptoui float %x to i64
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ret i64 %a
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}
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define ptx_device i64 @cvt_i64_f64(double %x) {
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; CHECK: cvt.rzi.u64.f64 rd{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui double %x to i64
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ret i64 %a
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}
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; f32
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define ptx_device float @cvt_f32_preds(i1 %x) {
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; CHECK: selp.f32 r{{[0-9]+}}, 0F3F800000, 0F00000000, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i1 %x to float
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ret float %a
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}
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define ptx_device float @cvt_f32_i8(i8 %x) {
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; CHECK: cvt.rn.f32.u8 r{{[0-9]+}}, rq{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i8 %x to float
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ret float %a
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}
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define ptx_device float @cvt_f32_i16(i16 %x) {
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; CHECK: cvt.rn.f32.u16 r{{[0-9]+}}, rh{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i16 %x to float
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ret float %a
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}
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define ptx_device float @cvt_f32_i32(i32 %x) {
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; CHECK: cvt.rn.f32.u32 r{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i32 %x to float
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ret float %a
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}
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define ptx_device float @cvt_f32_i64(i64 %x) {
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; CHECK: cvt.rn.f32.u64 r{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i64 %x to float
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ret float %a
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}
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define ptx_device float @cvt_f32_f64(double %x) {
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; CHECK: cvt.rn.f32.f64 r{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fptrunc double %x to float
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ret float %a
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}
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; f64
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define ptx_device double @cvt_f64_preds(i1 %x) {
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; CHECK: selp.f64 rd{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, p{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i1 %x to double
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ret double %a
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}
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define ptx_device double @cvt_f64_i8(i8 %x) {
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; CHECK: cvt.rn.f64.u8 rd{{[0-9]+}}, rq{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i8 %x to double
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ret double %a
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}
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define ptx_device double @cvt_f64_i16(i16 %x) {
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; CHECK: cvt.rn.f64.u16 rd{{[0-9]+}}, rh{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i16 %x to double
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ret double %a
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}
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define ptx_device double @cvt_f64_i32(i32 %x) {
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; CHECK: cvt.rn.f64.u32 rd{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i32 %x to double
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ret double %a
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}
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define ptx_device double @cvt_f64_i64(i64 %x) {
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; CHECK: cvt.rn.f64.u64 rd{{[0-9]+}}, rd{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = uitofp i64 %x to double
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ret double %a
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}
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define ptx_device double @cvt_f64_f32(float %x) {
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; CHECK: cvt.f64.f32 rd{{[0-9]+}}, r{{[0-9]+}};
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; CHECK-NEXT: ret;
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%a = fpext float %x to double
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ret double %a
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}
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