llvm-6502/test/CodeGen/Thumb2/thumb2-ldrh.ll
Bob Wilson 49d9dc4dd2 --- Reverse-merging r98637 into '.':
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16 16:59:47 +00:00

72 lines
1.5 KiB
LLVM

; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i16 @f1(i16* %v) {
entry:
; CHECK: f1:
; CHECK: ldrh r0, [r0]
%tmp = load i16* %v
ret i16 %tmp
}
define i16 @f2(i16* %v) {
entry:
; CHECK: f2:
; CHECK: ldrh.w r0, [r0, #+2046]
%tmp2 = getelementptr i16* %v, i16 1023
%tmp = load i16* %tmp2
ret i16 %tmp
}
define i16 @f3(i16* %v) {
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
; CHECK: ldrh r0, [r0, r1]
%tmp2 = getelementptr i16* %v, i16 2048
%tmp = load i16* %tmp2
ret i16 %tmp
}
define i16 @f4(i32 %base) {
entry:
; CHECK: f4:
; CHECK: ldrh r0, [r0, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
ret i16 %tmp3
}
define i16 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
; CHECK: ldrh r0, [r0, r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
ret i16 %tmp3
}
define i16 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
; CHECK: ldrh.w r0, [r0, r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp4 = load i16* %tmp3
ret i16 %tmp4
}
define i16 @f7(i32 %base, i32 %offset) {
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
; CHECK: ldrh r0, [r0, r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp4 = load i16* %tmp3
ret i16 %tmp4
}