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cee63322ea
Default HasSetDirective to true, since most targets have it. The targets that claim to not have it probably do, or it is spelled differently. These include Blackfin, Mips, Alpha, and PIC16. All of these except pic16 are normal ELF targets, so they almost certainly have it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94585 91177308-0d34-0410-b5e6-96231b3b80d8
121 lines
3.3 KiB
C++
121 lines
3.3 KiB
C++
//===-- X86MCAsmInfo.cpp - X86 asm properties -----------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the X86MCAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "X86MCAsmInfo.h"
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#include "X86TargetMachine.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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enum AsmWriterFlavorTy {
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// Note: This numbering has to match the GCC assembler dialects for inline
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// asm alternatives to work right.
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ATT = 0, Intel = 1
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};
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static cl::opt<AsmWriterFlavorTy>
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AsmWriterFlavor("x86-asm-syntax", cl::init(ATT),
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cl::desc("Choose style of code to emit from X86 backend:"),
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cl::values(clEnumValN(ATT, "att", "Emit AT&T-style assembly"),
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clEnumValN(Intel, "intel", "Emit Intel-style assembly"),
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clEnumValEnd));
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static const char *const x86_asm_table[] = {
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"{si}", "S",
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"{di}", "D",
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"{ax}", "a",
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"{cx}", "c",
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"{memory}", "memory",
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"{flags}", "",
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"{dirflag}", "",
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"{fpsr}", "",
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"{cc}", "cc",
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0,0};
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X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &Triple) {
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AsmTransCBE = x86_asm_table;
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AssemblerDialect = AsmWriterFlavor;
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bool is64Bit = Triple.getArch() == Triple::x86_64;
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TextAlignFillValue = 0x90;
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if (!is64Bit)
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Data64bitsDirective = 0; // we can't emit a 64-bit unit
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CommentString = "##";
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PCSymbol = ".";
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SupportsDebugInformation = true;
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DwarfUsesInlineInfoSection = true;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::Dwarf;
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AbsoluteEHSectionOffsets = false;
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}
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X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &Triple) {
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AsmTransCBE = x86_asm_table;
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AssemblerDialect = AsmWriterFlavor;
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PrivateGlobalPrefix = ".L";
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WeakRefDirective = "\t.weak\t";
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PCSymbol = ".";
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// Set up DWARF directives
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HasLEB128 = true; // Target asm supports leb128 directives (little-endian)
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// Debug Information
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AbsoluteDebugSectionOffsets = true;
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SupportsDebugInformation = true;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::Dwarf;
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AbsoluteEHSectionOffsets = false;
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}
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MCSection *X86ELFMCAsmInfo::getNonexecutableStackSection(MCContext &Ctx) const {
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return MCSectionELF::Create(".note.GNU-stack", MCSectionELF::SHT_PROGBITS,
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0, SectionKind::getMetadata(), false, Ctx);
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}
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X86MCAsmInfoCOFF::X86MCAsmInfoCOFF(const Triple &Triple) {
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AsmTransCBE = x86_asm_table;
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AssemblerDialect = AsmWriterFlavor;
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}
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X86WinMCAsmInfo::X86WinMCAsmInfo(const Triple &Triple) {
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AsmTransCBE = x86_asm_table;
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AssemblerDialect = AsmWriterFlavor;
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GlobalPrefix = "_";
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CommentString = ";";
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PrivateGlobalPrefix = "$";
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AlignDirective = "\tALIGN\t";
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ZeroDirective = "\tdb\t";
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AsciiDirective = "\tdb\t";
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AscizDirective = 0;
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Data8bitsDirective = "\tdb\t";
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Data16bitsDirective = "\tdw\t";
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Data32bitsDirective = "\tdd\t";
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Data64bitsDirective = "\tdq\t";
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HasDotTypeDotSizeDirective = false;
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HasSingleParameterDotFile = false;
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AlignmentIsInBytes = true;
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}
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