mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
36e5511188
Some of these tests did not specify a cpu but were also sensitive to instruction scheduling and/or register assignment choices. A few others similarly-sensitive tests specified a cpu (often the POWER7), and while the P7 currently uses the default model for PPC64, this will soon change. For those tests which should not really be cpu-dependent anyway, the cpu is set to the generic 'ppc64'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195977 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
604 B
LLVM
25 lines
604 B
LLVM
; RUN: llc -mtriple="powerpc-unknown-linux-gnu" -mcpu=ppc64 < %s | FileCheck %s
|
|
; PR15286
|
|
|
|
%va_list = type {i8, i8, i16, i8*, i8*}
|
|
declare void @llvm.va_copy(i8*, i8*)
|
|
|
|
define void @test_vacopy() nounwind {
|
|
entry:
|
|
%0 = alloca %va_list
|
|
%1 = alloca %va_list
|
|
%2 = bitcast %va_list* %0 to i8*
|
|
%3 = bitcast %va_list* %1 to i8*
|
|
|
|
call void @llvm.va_copy(i8* %3, i8* %2)
|
|
|
|
ret void
|
|
}
|
|
; CHECK: test_vacopy:
|
|
; CHECK: lwz [[REG1:[0-9]+]], {{.*}}
|
|
; CHECK: lwz [[REG2:[0-9]+]], {{.*}}
|
|
; CHECK: lwz [[REG3:[0-9]+]], {{.*}}
|
|
; CHECK: stw [[REG1]], {{.*}}
|
|
; CHECK: stw [[REG2]], {{.*}}
|
|
; CHECK: stw [[REG3]], {{.*}}
|