Daniel Sanders 817cbdeae6 [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. ... Summary: Previously it (incorrectly) used GPR's. Patch by Simon Dardis. A couple small corrections by myself. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10567 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-27 15:39:19 +00:00
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abiflags.s	Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags	2014-07-14 15:05:51 +00:00
invalid-mips64r2.s	[mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2	2014-05-12 12:15:41 +00:00
invalid.s	[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).	2014-06-11 15:05:56 +00:00
valid-xfail.s	[mips] Add synci instruction.	2014-11-27 17:28:10 +00:00
valid.s	[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.	2015-06-27 15:39:19 +00:00