Joey Gouly 4cbbbf49b6 This reverts r155000. ... The cdp2 instruction should have the same restrictions as cdp on the co-processor registers. VFP instructions on v8/AArch32 share the same encoding space as cdp2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184445 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-20 17:42:36 +00:00
..
AArch64	AArch64: print relocation addends if present on AArch64	2013-06-17 03:03:06 +00:00
ARM	This reverts r155000.	2013-06-20 17:42:36 +00:00
AsmParser
COFF
Disassembler	This reverts r155000.	2013-06-20 17:42:36 +00:00
ELF	[MC/DWARF] Generate multiple .debug_line entries for adjacent .loc directives	2013-06-19 21:27:27 +00:00
MachO
Markup
MBlaze
Mips	Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers.	2013-06-20 11:21:49 +00:00
PowerPC	[MC] Support @ variants with directional labels	2013-06-20 16:24:17 +00:00
SystemZ
X86	Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.	2013-06-18 17:08:10 +00:00