llvm-6502/lib/Target/SparcV9
Vikram S. Adve b15f8d446a Several fixes to handling of int CC register:
(1) An int CC live range must be spilled if there are any interferences,
    even if no other "neighbour" in the interf. graph has been allocated
    that reg. yet.  This is actually true of any class with only one reg!

(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
    be spilled so that the machine-independent spill code doesn't have to
    make the machine-dependent decision of which CC name to use based on
    operand type: %xcc or %icc.  (These are two halves of the same register.)

(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
    These should never have been the same, and this is necessary now for #2.

(4) All RDCCR and WRCCR instructions are directly generated with the
    phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
    deal with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7151 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10 19:42:11 +00:00
..
InstrSched A def. operand of a machine instruction may be an ordinary Value*, 2003-07-02 01:16:01 +00:00
InstrSelection Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed. 2003-07-06 20:33:21 +00:00
LiveVar
ModuloScheduling
RegAlloc Minor beautification: fold a couple of lines of code. 2003-07-02 01:24:00 +00:00
.cvsignore
EmitBytecodeToAssembly.cpp
MachineCodeForInstruction.h
MachineFunctionInfo.h
MachineInstrAnnot.h
Makefile Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
MappingInfo.cpp
MappingInfo.h
SparcV9_F2.td
SparcV9_F3.td Removed unnecessary assignment (it was taken care by a superclass) and clarified 2003-07-07 22:18:06 +00:00
SparcV9_F4.td * Force all "don't care" bits to 0 so that there are absolutely no unset bits in 2003-07-02 19:37:48 +00:00
SparcV9_Reg.td
SparcV9.burg.in
SparcV9.td Elaborated assembly syntax of instructions in the comments. 2003-07-07 22:18:42 +00:00
SparcV9AsmPrinter.cpp Several fixes to handling of int CC register: 2003-07-10 19:42:11 +00:00
SparcV9CodeEmitter.cpp Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
SparcV9CodeEmitter.h Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
SparcV9Instr.def
SparcV9InstrInfo.cpp Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
SparcV9InstrSelection.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcV9InstrSelectionSupport.h
SparcV9Internals.h Moved RegClassIDs enum to be next to the RegTypes enum. 2003-07-07 16:52:39 +00:00
SparcV9PeepholeOpts.cpp
SparcV9PreSelection.cpp (1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and 2003-07-02 01:23:15 +00:00
SparcV9PrologEpilogInserter.cpp
SparcV9RegClassInfo.cpp Several fixes to handling of int CC register: 2003-07-10 19:42:11 +00:00
SparcV9RegClassInfo.h Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcV9RegInfo.cpp Several fixes to handling of int CC register: 2003-07-10 19:42:11 +00:00
SparcV9SchedInfo.cpp
SparcV9StackSlots.cpp
SparcV9TargetMachine.cpp