llvm-6502/test/CodeGen
Evan Cheng bf34a5ec22 sext(undef) = 0, because the top bits will all be the same.
zext(undef) = 0, because the top bits will be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15 02:22:10 +00:00
..
Alpha
ARM Testcase for r127630. 2011-03-15 01:49:08 +00:00
Blackfin Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04 20:03:14 +00:00
CBackend
CellSPU Roll r127459 back in: 2011-03-11 21:52:04 +00:00
CPP
Generic
MBlaze
Mips Revert "Re-enable test and hope to silence the buildbots", still broken. 2011-03-09 22:48:46 +00:00
MSP430
PowerPC Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00
PTX PTX: Emit global arrays with proper sizes 2011-03-14 15:40:11 +00:00
SPARC
SystemZ
Thumb Roll r127459 back in: 2011-03-11 21:52:04 +00:00
Thumb2 Roll r127459 back in: 2011-03-11 21:52:04 +00:00
X86 sext(undef) = 0, because the top bits will all be the same. 2011-03-15 02:22:10 +00:00
XCore Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00