llvm-6502/test/CodeGen
Chandler Carruth b1b266ca9c [x86] Expand the ISA coverage of our blend test in preparation for
merging ISA-specific testing into this file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218816 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 21:03:21 +00:00
..
AArch64 Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
ARM ARM: allow copying of CPSR when all else fails. 2014-10-01 19:21:03 +00:00
CPP
Generic ARM: yes it can (as of r218789) 2014-10-01 20:31:58 +00:00
Hexagon Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Inputs Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Mips Add fptrunc to mips fast-sel 2014-10-01 18:47:02 +00:00
MSP430
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
R600 R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table 2014-10-01 17:15:17 +00:00
SPARC
SystemZ
Thumb Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [x86] Expand the ISA coverage of our blend test in preparation for 2014-10-01 21:03:21 +00:00
XCore Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00