llvm-6502/test/MC/Disassembler
Kristof Beyls b1d081230e Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175164 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 14:46:12 +00:00
..
AArch64 Add AArch64 CRC32 instructions 2013-02-06 09:13:13 +00:00
ARM Make ARMAsmParser accept the correct alignment specifier syntax in instructions. 2013-02-14 14:46:12 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips This is a resubmittal. For some reason it broke the bots yesterday 2013-01-17 00:28:20 +00:00
X86 added test cases for r174920 (prefetch disassembly) 2013-02-12 17:07:44 +00:00
XCore [XCore] Add missing l2rus instructions. 2013-01-27 22:28:30 +00:00