Dan Gohman b1e8cad61e Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation, ... which is represented in codegen as an 'and' operation. This matches them with movz instructions, instead of leaving them to be matched by and instructions with an immediate field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8		2008-07-28 22:18:25 +00:00
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Alpha	Don't try to compile tests for the ev56 alpha subtarget, which hasn't been	2008-06-12 13:44:26 +00:00
ARM	Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.	2008-07-25 00:55:17 +00:00
CBackend	In the CBackend, use casts to force integer add, subtract, and	2008-07-18 18:43:12 +00:00
CellSPU	Add necessary 64-bit support so that gcc frontend compiles (mostly). Current	2008-06-02 22:18:03 +00:00
CPP	Put CPPBackend tests into their own directory and run them only if they're	2008-07-10 22:35:32 +00:00
Generic	Turn LegalizeTypes back off again for the moment:	2008-07-17 17:06:03 +00:00
IA64	sabre brings to my attention that the 'tr' suffix is also obsolete	2008-05-20 21:00:03 +00:00
PowerPC	Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory (all of the parameter registers are used) are loaded from sp offsets that were off by 4.	2008-07-24 08:17:07 +00:00
SPARC	sabre brings to my attention that the 'tr' suffix is also obsolete	2008-05-20 21:00:03 +00:00
X86	Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation,	2008-07-28 22:18:25 +00:00