llvm-6502/test/CodeGen
Craig Topper b1ff87ec86 [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead.
Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero.

Fixes PR23100.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-04 02:08:20 +00:00
..
AArch64 [DAGCombiner] Combine shuffles of BUILD_VECTOR and SCALAR_TO_VECTOR 2015-04-03 10:02:21 +00:00
ARM Verifier: Check that inlined-at locations agree 2015-04-03 16:54:30 +00:00
BPF [bpf] mark mov instructions as ReMaterializable 2015-03-31 02:49:58 +00:00
CPP
Generic LLParser: Require non-null scope for MDLocation and MDLocalVariable 2015-03-27 17:56:39 +00:00
Hexagon Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
Inputs
Mips [mips] Make sure that we don't adjust the stack pointer by zero amount. 2015-04-02 10:14:54 +00:00
MSP430
NVPTX [NVPTX] Associate a minimum PTX version for each SM architecture 2015-03-30 19:30:55 +00:00
PowerPC [PowerPC] Enable splat generation for BUILD_VECTOR with little endian 2015-04-03 13:48:24 +00:00
R600
SPARC
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
Thumb
Thumb2
WinEH [WinEH] Fill out CatchHigh in the TryBlockMap 2015-04-03 23:37:34 +00:00
X86 [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead. 2015-04-04 02:08:20 +00:00
XCore