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https://github.com/c64scene-ar/llvm-6502.git
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23dc769a9b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160270 91177308-0d34-0410-b5e6-96231b3b80d8
77 lines
2.7 KiB
C++
77 lines
2.7 KiB
C++
//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// The AMDGPU TargetMachine interface definition for hw codgen targets.
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//
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//===----------------------------------------------------------------------===//
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#ifndef AMDGPU_TARGET_MACHINE_H
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#define AMDGPU_TARGET_MACHINE_H
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPUSubtarget.h"
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#include "AMDILFrameLowering.h"
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#include "AMDILIntrinsicInfo.h"
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#include "R600ISelLowering.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/Target/TargetData.h"
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namespace llvm {
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MCAsmInfo* createMCAsmInfo(const Target &T, StringRef TT);
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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AMDGPUSubtarget Subtarget;
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const TargetData DataLayout;
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AMDILFrameLowering FrameLowering;
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AMDILIntrinsicInfo IntrinsicInfo;
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const AMDGPUInstrInfo * InstrInfo;
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AMDGPUTargetLowering * TLInfo;
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const InstrItineraryData* InstrItins;
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bool mDump;
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public:
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AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
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StringRef CPU,
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TargetOptions Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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~AMDGPUTargetMachine();
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virtual const AMDILFrameLowering* getFrameLowering() const {
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return &FrameLowering;
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}
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virtual const AMDILIntrinsicInfo* getIntrinsicInfo() const {
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return &IntrinsicInfo;
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}
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virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;}
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virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; }
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virtual const AMDGPURegisterInfo *getRegisterInfo() const {
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return &InstrInfo->getRegisterInfo();
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}
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virtual AMDGPUTargetLowering * getTargetLowering() const {
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return TLInfo;
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}
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virtual const InstrItineraryData* getInstrItineraryData() const {
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return InstrItins;
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}
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virtual const TargetData* getTargetData() const { return &DataLayout; }
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virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
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virtual bool addPassesToEmitFile(PassManagerBase &PM,
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formatted_raw_ostream &Out,
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CodeGenFileType FileType,
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bool DisableVerify,
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AnalysisID StartAfter = 0,
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AnalysisID StopAfter = 0);
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};
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} // End namespace llvm
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#endif // AMDGPU_TARGET_MACHINE_H
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