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https://github.com/c64scene-ar/llvm-6502.git
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b26c7727c9
DomainValues that are only used by "don't care" instructions are now collapsed to the first possible execution domain after all basic blocks have been processed. This typically means the PS domain on x86. For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are completely collapsed to the PS domain instead of containing a mix of execution domains created by isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144037 91177308-0d34-0410-b5e6-96231b3b80d8
184 lines
6.4 KiB
LLVM
184 lines
6.4 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; CHECK: vandpd
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define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %x to <4 x i64>
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%1 = bitcast <4 x double> %y to <4 x i64>
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%and.i = and <4 x i64> %0, %1
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%2 = bitcast <4 x i64> %and.i to <4 x double>
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ret <4 x double> %2
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}
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; CHECK: vandpd LCP{{.*}}(%rip)
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define <4 x double> @andpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %y to <4 x i64>
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%and.i = and <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
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%1 = bitcast <4 x i64> %and.i to <4 x double>
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ret <4 x double> %1
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}
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; CHECK: vandps
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define <8 x float> @andps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %x to <8 x i32>
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%1 = bitcast <8 x float> %y to <8 x i32>
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%and.i = and <8 x i32> %0, %1
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%2 = bitcast <8 x i32> %and.i to <8 x float>
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ret <8 x float> %2
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}
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; CHECK: vandps LCP{{.*}}(%rip)
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define <8 x float> @andps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %y to <8 x i32>
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%and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
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%1 = bitcast <8 x i32> %and.i to <8 x float>
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ret <8 x float> %1
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}
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; CHECK: vxorpd
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define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %x to <4 x i64>
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%1 = bitcast <4 x double> %y to <4 x i64>
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%xor.i = xor <4 x i64> %0, %1
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%2 = bitcast <4 x i64> %xor.i to <4 x double>
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ret <4 x double> %2
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}
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; CHECK: vxorpd LCP{{.*}}(%rip)
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define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %y to <4 x i64>
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%xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
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%1 = bitcast <4 x i64> %xor.i to <4 x double>
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ret <4 x double> %1
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}
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; CHECK: vxorps
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define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %x to <8 x i32>
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%1 = bitcast <8 x float> %y to <8 x i32>
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%xor.i = xor <8 x i32> %0, %1
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%2 = bitcast <8 x i32> %xor.i to <8 x float>
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ret <8 x float> %2
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}
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; CHECK: vxorps LCP{{.*}}(%rip)
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define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %y to <8 x i32>
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%xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
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%1 = bitcast <8 x i32> %xor.i to <8 x float>
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ret <8 x float> %1
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}
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; CHECK: vorpd
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define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %x to <4 x i64>
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%1 = bitcast <4 x double> %y to <4 x i64>
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%or.i = or <4 x i64> %0, %1
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%2 = bitcast <4 x i64> %or.i to <4 x double>
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ret <4 x double> %2
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}
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; CHECK: vorpd LCP{{.*}}(%rip)
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define <4 x double> @orpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %y to <4 x i64>
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%or.i = or <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
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%1 = bitcast <4 x i64> %or.i to <4 x double>
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ret <4 x double> %1
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}
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; CHECK: vorps
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define <8 x float> @orps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %x to <8 x i32>
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%1 = bitcast <8 x float> %y to <8 x i32>
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%or.i = or <8 x i32> %0, %1
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%2 = bitcast <8 x i32> %or.i to <8 x float>
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ret <8 x float> %2
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}
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; CHECK: vorps LCP{{.*}}(%rip)
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define <8 x float> @orps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %y to <8 x i32>
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%or.i = or <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
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%1 = bitcast <8 x i32> %or.i to <8 x float>
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ret <8 x float> %1
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}
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; CHECK: vandnpd
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define <4 x double> @andnotpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <4 x double> %x to <4 x i64>
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%neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1>
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%1 = bitcast <4 x double> %y to <4 x i64>
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%and.i = and <4 x i64> %1, %neg.i
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%2 = bitcast <4 x i64> %and.i to <4 x double>
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ret <4 x double> %2
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}
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; CHECK: vandnpd (%
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define <4 x double> @andnotpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp {
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entry:
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%tmp2 = load <4 x double>* %x, align 32
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%0 = bitcast <4 x double> %y to <4 x i64>
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%neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1>
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%1 = bitcast <4 x double> %tmp2 to <4 x i64>
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%and.i = and <4 x i64> %1, %neg.i
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%2 = bitcast <4 x i64> %and.i to <4 x double>
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ret <4 x double> %2
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}
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; CHECK: vandnps
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define <8 x float> @andnotps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
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entry:
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%0 = bitcast <8 x float> %x to <8 x i32>
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%neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%1 = bitcast <8 x float> %y to <8 x i32>
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%and.i = and <8 x i32> %1, %neg.i
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%2 = bitcast <8 x i32> %and.i to <8 x float>
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ret <8 x float> %2
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}
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; CHECK: vandnps (%
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define <8 x float> @andnotps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp {
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entry:
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%tmp2 = load <8 x float>* %x, align 32
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%0 = bitcast <8 x float> %y to <8 x i32>
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%neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%1 = bitcast <8 x float> %tmp2 to <8 x i32>
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%and.i = and <8 x i32> %1, %neg.i
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%2 = bitcast <8 x i32> %and.i to <8 x float>
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ret <8 x float> %2
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}
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;;; Test that basic 2 x i64 logic use the integer version on AVX
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; CHECK: vpandn %xmm
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define <2 x i64> @vpandn(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%y = xor <2 x i64> %a2, <i64 -1, i64 -1>
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%x = and <2 x i64> %a, %y
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ret <2 x i64> %x
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}
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; CHECK: vpand %xmm
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define <2 x i64> @vpand(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%x = and <2 x i64> %a2, %b
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ret <2 x i64> %x
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}
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