mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
18cba562c8
Changes to ARM unwind opcode assembler:
* Fix multiple .save or .vsave directives. Besides, the
order is preserved now.
* For the directives which will generate multiple opcodes,
such as ".save {r0-r11}", the order of the unwind opcode
is fixed now, i.e. the registers with less encoding value
are popped first.
* Fix the $sp offset calculation. Now, we can use the
.setfp, .pad, .save, and .vsave directives at any order.
Changes to test cases:
* Add test cases to check the order of multiple opcodes
for the .save directive.
* Fix the incorrect $sp offset in the test case. The
stack pointer offset specified in the test case was
incorrect. (Changed test cases: ehabi-mc-section.ll and
ehabi-mc.ll)
* The opcode to restore $sp are slightly reordered. The
behavior are not changed, and the new output is same
as the output of GNU as. (Changed test cases:
eh-directive-pad.s and eh-directive-setfp.s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183627 91177308-0d34-0410-b5e6-96231b3b80d8
94 lines
2.3 KiB
ArmAsm
94 lines
2.3 KiB
ArmAsm
@ Integrated test for ARM unwind directive parser and assembler.
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@ This is a simplified real world test case generated from this C++ code
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@ (with and without -fomit-frame-pointer)
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@
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@ extern void print(int, int, int, int, int);
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@ extern void print(double, double, double, double, double);
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@
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@ void test(int a, int b, int c, int d, int e,
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@ double m, double n, double p, double q, double r) {
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@ try {
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@ print(a, b, c, d, e);
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@ } catch (...) {
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@ print(m, n, p, q, r);
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@ }
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@ }
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@
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@ This test case should check the unwind opcode to adjust the opcode and
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@ restore the general-purpose and VFP registers.
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@ RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o - \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s
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@-------------------------------------------------------------------------------
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@ Assembly without frame pointer elimination
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@-------------------------------------------------------------------------------
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.syntax unified
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.section .TEST1
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.globl func1
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.align 2
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.type func1,%function
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func1:
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.fnstart
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.save {r4, r11, lr}
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push {r4, r11, lr}
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.setfp r11, sp, #4
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add r11, sp, #4
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.vsave {d8, d9, d10, d11, d12}
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vpush {d8, d9, d10, d11, d12}
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.pad #28
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sub sp, sp, #28
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sub sp, r11, #44
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vpop {d8, d9, d10, d11, d12}
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pop {r4, r11, pc}
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.Ltmp1:
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.size func1, .Ltmp1-func1
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.globl __gxx_personality_v0
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST1
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 C94A9B01 B0818484 |.....J......|
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@ CHECK: )
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@ CHECK: }
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@-------------------------------------------------------------------------------
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@ Assembly with frame pointer elimination
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@-------------------------------------------------------------------------------
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.section .TEST2
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.globl func2
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.align 2
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.type func2,%function
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func2:
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.fnstart
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.save {r4, lr}
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push {r4, lr}
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.vsave {d8, d9, d10, d11, d12}
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vpush {d8, d9, d10, d11, d12}
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.pad #24
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sub sp, sp, #24
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add sp, sp, #24
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vpop {d8, d9, d10, d11, d12}
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pop {r4, pc}
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.Ltmp2:
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.size func2, .Ltmp2-func2
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.globl __gxx_personality_v0
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST2
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 84C90501 B0B0B0A8 |............|
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@ CHECK: )
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@ CHECK: }
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