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b2fd770136
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the use of vector intrinsics, especially in NEON when programmers know the layout of the register file. This enables codegen to eliminate a lot of the subregister traffic it would otherwise generate. This commit only enables this for a small number of floating-point cases, but a lot more integer cases. I assume this is okay for all ports, but I did not do extensive testing of the quality of code involving i512 vectors and the like. If there is a use case where this generates worse code than before, let me know and we can scale it back. This fixes <rdar://problem/9036264>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127317 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
ADCE | ||
ArgumentPromotion | ||
BlockPlacement | ||
BranchFolding | ||
CodeExtractor | ||
CodeGenPrepare | ||
ConstantMerge | ||
ConstProp | ||
CorrelatedValuePropagation | ||
DeadArgElim | ||
DeadStoreElimination | ||
EarlyCSE | ||
FunctionAttrs | ||
GlobalDCE | ||
GlobalOpt | ||
GVN | ||
IndVarSimplify | ||
Inline | ||
InstCombine | ||
InstSimplify | ||
Internalize | ||
IPConstantProp | ||
JumpThreading | ||
LCSSA | ||
LICM | ||
LoopDeletion | ||
LoopIdiom | ||
LoopRotate | ||
LoopSimplify | ||
LoopStrengthReduce | ||
LoopUnroll | ||
LoopUnswitch | ||
LowerAtomic | ||
LowerInvoke | ||
LowerSetJmp | ||
LowerSwitch | ||
Mem2Reg | ||
MemCpyOpt | ||
MergeFunc | ||
PruneEH | ||
Reassociate | ||
ScalarRepl | ||
SCCP | ||
SimplifyCFG | ||
SimplifyLibCalls | ||
Sink | ||
SRETPromotion | ||
StripSymbols | ||
TailCallElim | ||
TailDup |