llvm-6502/test/MC/Mips/mips32
Daniel Sanders b396af3752 [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64
Summary:
DCL[ZO] are now correctly marked as being MIPS64 instructions. This has no
effect on the CodeGen tests since expansion of i64 prevented their use
anyway.

The check for MIPS16 to prevent the use of CLZ no longer prevents DCLZ as
well. This is not a functional change since DCLZ is still prohibited by
being a MIPS64 instruction (MIPS16 is only compatible with MIPS32).

No functional change

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12 12:41:59 +00:00
..
invalid-mips32r2-xfail.s [mips] Add negative tests confirm that supported ISA's don't allow instructions added in later ISA's 2014-04-03 14:14:22 +00:00
invalid-mips32r2.s [mips] Removed two-operand alias for sllv, sr[al]v, rotrv, dsllv, dsr[al]v, and drotrv 2014-05-01 10:08:36 +00:00
invalid-mips64.s [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 2014-05-12 12:41:59 +00:00
valid-xfail.s [mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS. 2014-05-08 15:17:29 +00:00
valid.s [mips] Added missing dsra -> dsrav and sra -> srav aliases. 2014-05-09 09:24:49 +00:00