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https://github.com/c64scene-ar/llvm-6502.git
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b3a7e21b7e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25692 91177308-0d34-0410-b5e6-96231b3b80d8
128 lines
3.5 KiB
C++
128 lines
3.5 KiB
C++
//===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "X86Subtarget.h"
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#include "llvm/Module.h"
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#include "X86GenSubtarget.inc"
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using namespace llvm;
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static void GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX,
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unsigned *ECX, unsigned *EDX) {
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#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
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#if defined(__GNUC__)
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asm ("pushl\t%%ebx\n\t"
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"cpuid\n\t"
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"movl\t%%ebx, %%esi\n\t"
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"popl\t%%ebx"
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: "=a" (*EAX),
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"=S" (*EBX),
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"=c" (*ECX),
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"=d" (*EDX)
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: "a" (value));
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#endif
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#endif
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}
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static const char *GetCurrentX86CPU() {
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unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
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GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
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unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11
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unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7
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GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
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bool Em64T = EDX & (1 << 29);
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switch (Family) {
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case 3:
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return "i386";
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case 4:
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return "i486";
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case 5:
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switch (Model) {
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case 4: return "pentium-mmx";
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default: return "pentium";
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}
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break;
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case 6:
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switch (Model) {
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case 1: return "pentiumpro";
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case 3:
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case 5:
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case 6: return "pentium2";
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case 7:
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case 8:
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case 10:
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case 11: return "pentium3";
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case 9:
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case 13: return "pentium-m";
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case 14: return "yonah";
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default: return "i686";
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}
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case 15: {
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switch (Model) {
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case 3:
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case 4:
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return (Em64T) ? "nocona" : "prescott";
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default:
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return (Em64T) ? "x86-64" : "pentium4";
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}
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}
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default:
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return "generic";
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}
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}
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X86Subtarget::X86Subtarget(const Module &M, const std::string &FS)
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: stackAlignment(8), indirectExternAndWeakGlobals(false) {
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// Determine default and user specified characteristics
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std::string CPU = GetCurrentX86CPU();
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// Parse features string.
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ParseSubtargetFeatures(FS, CPU);
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// Default to ELF unless otherwise specified.
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TargetType = isELF;
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// FIXME: Force these off until they work. An llc-beta option should turn
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// them back on.
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X86SSELevel = NoMMXSSE;
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X863DNowLevel = NoThreeDNow;
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// Set the boolean corresponding to the current target triple, or the default
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// if one cannot be determined, to true.
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const std::string& TT = M.getTargetTriple();
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if (TT.length() > 5) {
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if (TT.find("cygwin") != std::string::npos ||
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TT.find("mingw") != std::string::npos)
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TargetType = isCygwin;
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else if (TT.find("darwin") != std::string::npos)
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TargetType = isDarwin;
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else if (TT.find("win32") != std::string::npos)
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TargetType = isWindows;
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} else if (TT.empty()) {
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#if defined(__CYGWIN__) || defined(__MINGW32__)
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TargetType = isCygwin;
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#elif defined(__APPLE__)
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TargetType = isDarwin;
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#elif defined(_WIN32)
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TargetType = isWindows;
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#endif
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}
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if (TargetType == isDarwin) {
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stackAlignment = 16;
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indirectExternAndWeakGlobals = true;
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}
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}
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