mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-19 03:29:22 +00:00
cbe70e1c4b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28606 91177308-0d34-0410-b5e6-96231b3b80d8
454 lines
13 KiB
C++
Executable File
454 lines
13 KiB
C++
Executable File
//===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Intel format assembly language.
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// This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86IntelAsmPrinter.h"
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#include "X86.h"
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#include "llvm/Constants.h"
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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X86IntelAsmPrinter::X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
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: X86SharedAsmPrinter(O, TM) {
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}
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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EmitConstantPool(MF.getConstantPool());
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// Print out labels for the function.
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SwitchToTextSection("_text", MF.getFunction());
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EmitAlignment(4);
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if (MF.getFunction()->getLinkage() == GlobalValue::ExternalLinkage)
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O << "\tpublic " << CurrentFnName << "\n";
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O << CurrentFnName << "\tproc near\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block if there are any predecessors.
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if (I->pred_begin() != I->pred_end()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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O << CurrentFnName << "\tendp\n";
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// We didn't modify anything.
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return false;
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}
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void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
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unsigned char value = MI->getOperand(Op).getImmedValue();
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assert(value <= 7 && "Invalid ssecc argument!");
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switch (value) {
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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}
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}
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void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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const char *Modifier) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
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unsigned Reg = MO.getReg();
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if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
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MVT::ValueType VT = (strcmp(Modifier,"subreg16") == 0)
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? MVT::i16 : MVT::i8;
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Reg = getX86SubSuperRegister(Reg, VT);
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}
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O << RI.get(Reg).Name;
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} else
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O << "reg" << MO.getReg();
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return;
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case MachineOperand::MO_Immediate:
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O << MO.getImmedValue();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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case MachineOperand::MO_ConstantPoolIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << "OFFSET ";
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O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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<< MO.getConstantPoolIndex();
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << Offset;
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O << "]";
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp && !isCallOp) O << "OFFSET ";
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O << Mang->getValueName(MO.getGlobal());
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << Offset;
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return;
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}
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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if (!isCallOp) O << "OFFSET ";
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O << GlobalPrefix << MO.getSymbolName();
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return;
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}
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default:
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O << "<unknown operand type>"; return;
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}
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}
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void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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if (BaseReg.isFrameIndex()) {
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O << "[frame slot #" << BaseReg.getFrameIndex();
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if (DispSpec.getImmedValue())
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O << " + " << DispSpec.getImmedValue();
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O << "]";
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return;
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}
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O << "[";
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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printOp(BaseReg, "mem");
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NeedPlus = true;
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}
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if (IndexReg.getReg()) {
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if (NeedPlus) O << " + ";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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printOp(IndexReg);
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NeedPlus = true;
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}
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if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
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if (NeedPlus)
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O << " + ";
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printOp(DispSpec, "mem");
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
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if (NeedPlus)
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if (DispVal > 0)
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O << " + ";
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else {
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O << " - ";
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DispVal = -DispVal;
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}
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O << DispVal;
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}
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}
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O << "]";
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}
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void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
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O << "\"L" << getFunctionNumber() << "$pb\"\n";
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O << "\"L" << getFunctionNumber() << "$pb\":";
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}
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bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
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const char Mode) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned Reg = MO.getReg();
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switch (Mode) {
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default: return true; // Unknown mode.
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case 'b': // Print QImode register
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Reg = getX86SubSuperRegister(Reg, MVT::i8);
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break;
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case 'h': // Print QImode high register
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Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
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break;
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case 'w': // Print HImode register
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Reg = getX86SubSuperRegister(Reg, MVT::i16);
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break;
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case 'k': // Print SImode register
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Reg = getX86SubSuperRegister(Reg, MVT::i32);
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break;
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}
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O << '%' << RI.get(Reg).Name;
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return false;
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'b': // Print QImode register
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case 'h': // Print QImode high register
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case 'w': // Print HImode register
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case 'k': // Print SImode register
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return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
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}
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}
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printOperand(MI, OpNo);
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return false;
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}
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bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printMemReference(MI, OpNo);
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return false;
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}
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/// printMachineInstruction -- Print out a single X86 LLVM instruction
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/// MI in Intel syntax to the current output stream.
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///
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void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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// See if a truncate instruction can be turned into a nop.
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switch (MI->getOpcode()) {
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default: break;
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case X86::TRUNC_GR32_GR16:
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case X86::TRUNC_GR32_GR8:
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case X86::TRUNC_GR16_GR8: {
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const MachineOperand &MO0 = MI->getOperand(0);
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const MachineOperand &MO1 = MI->getOperand(1);
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unsigned Reg0 = MO0.getReg();
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unsigned Reg1 = MO1.getReg();
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if (MI->getOpcode() == X86::TRUNC_GR32_GR16)
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Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
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else
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Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
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O << CommentString << " TRUNCATE ";
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if (Reg0 != Reg1)
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O << "\n\t";
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break;
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}
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}
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// Call the autogenerated instruction printer routines.
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printInstruction(MI);
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}
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bool X86IntelAsmPrinter::doInitialization(Module &M) {
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GlobalPrefix = "_";
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CommentString = ";";
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X86SharedAsmPrinter::doInitialization(M);
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PrivateGlobalPrefix = "$";
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AlignDirective = "\talign\t";
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ZeroDirective = "\tdb\t";
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ZeroDirectiveSuffix = " dup(0)";
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AsciiDirective = "\tdb\t";
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AscizDirective = 0;
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Data8bitsDirective = "\tdb\t";
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Data16bitsDirective = "\tdw\t";
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Data32bitsDirective = "\tdd\t";
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Data64bitsDirective = "\tdq\t";
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HasDotTypeDotSizeDirective = false;
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Mang->markCharUnacceptable('.');
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DefaultTextSection = "_text";
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DefaultDataSection = "_data";
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SwitchToSectionDirective = "";
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TextSectionStartSuffix = "\tsegment 'CODE'";
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DataSectionStartSuffix = "\tsegment 'DATA'";
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SectionEndDirectiveSuffix = "\tends\n";
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O << "\t.686\n\t.model flat\n\n";
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// Emit declarations for external functions.
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for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
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if (I->isExternal())
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O << "\textern " << Mang->getValueName(I) << ":near\n";
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// Emit declarations for external globals. Note that VC++ always declares
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// external globals to have type byte, and if that's good enough for VC++...
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for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
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I != E; ++I) {
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if (I->isExternal())
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O << "\textern " << Mang->getValueName(I) << ":byte\n";
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}
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return false;
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}
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bool X86IntelAsmPrinter::doFinalization(Module &M) {
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const TargetData *TD = TM.getTargetData();
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// Print out module-level global variables here.
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for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
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I != E; ++I) {
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if (I->isExternal()) continue; // External global require no code
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// Check to see if this is a special global used by LLVM, if so, emit it.
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if (EmitSpecialLLVMGlobal(I))
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continue;
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD->getTypeSize(C->getType());
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unsigned Align = getPreferredAlignmentLog(I);
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bool bCustomSegment = false;
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switch (I->getLinkage()) {
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case GlobalValue::LinkOnceLinkage:
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case GlobalValue::WeakLinkage:
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SwitchToDataSection("", 0);
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O << name << "?\tsegment common 'COMMON'\n";
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bCustomSegment = true;
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// FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
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// are also available.
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break;
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case GlobalValue::AppendingLinkage:
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SwitchToDataSection("", 0);
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O << name << "?\tsegment public 'DATA'\n";
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bCustomSegment = true;
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// FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
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// are also available.
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break;
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case GlobalValue::ExternalLinkage:
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O << "\tpublic " << name << "\n";
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// FALL THROUGH
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case GlobalValue::InternalLinkage:
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SwitchToDataSection(DefaultDataSection, I);
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break;
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default:
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assert(0 && "Unknown linkage type!");
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}
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if (!bCustomSegment)
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EmitAlignment(Align, I);
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O << name << ":\t\t\t\t" << CommentString << " " << I->getName() << '\n';
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EmitGlobalConstant(C);
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if (bCustomSegment)
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O << name << "?\tends\n";
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}
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// Bypass X86SharedAsmPrinter::doFinalization().
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AsmPrinter::doFinalization(M);
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SwitchToDataSection("", 0);
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O << "\tend\n";
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return false; // success
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}
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void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {
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unsigned NumElts = CVA->getNumOperands();
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if (NumElts) {
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// ML does not have escape sequences except '' for '. It also has a maximum
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// string length of 255.
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unsigned len = 0;
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bool inString = false;
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for (unsigned i = 0; i < NumElts; i++) {
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int n = cast<ConstantInt>(CVA->getOperand(i))->getRawValue() & 255;
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if (len == 0)
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O << "\tdb ";
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if (n >= 32 && n <= 127) {
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if (!inString) {
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if (len > 0) {
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O << ",'";
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len += 2;
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} else {
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O << "'";
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len++;
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}
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inString = true;
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}
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if (n == '\'') {
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O << "'";
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len++;
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}
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O << char(n);
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} else {
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if (inString) {
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O << "'";
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len++;
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inString = false;
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}
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if (len > 0) {
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O << ",";
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len++;
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}
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O << n;
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len += 1 + (n > 9) + (n > 99);
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}
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if (len > 60) {
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if (inString) {
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O << "'";
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inString = false;
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}
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O << "\n";
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len = 0;
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}
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}
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if (len > 0) {
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if (inString)
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O << "'";
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O << "\n";
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}
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}
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}
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// Include the auto-generated portion of the assembly writer.
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#include "X86GenAsmWriter1.inc"
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