llvm-6502/test/MC
Rafael Espindola b415e6b2f2 Centralize the handling of unique ids for temporary labels.
Before this patch code wanting to create temporary labels for a given entity
(function, cu, exception range, etc) had to keep its own counter to have stable
symbol names.

createTempSymbol would still add a suffix to make sure a new symbol was always
returned, but it kept a single counter. Because of that, if we were to use
just createTempSymbol("cu_begin"), the label could change from cu_begin42 to
cu_begin43 because some other code started using temporary labels.

Simplify this by just keeping one counter per prefix and removing the various
specialized counters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:07:06 +00:00
..
AArch64 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
ARM [ARM] Add support for ARMV6K subtarget (LLVM) 2015-03-17 11:55:28 +00:00
AsmParser Centralize the handling of unique ids for temporary labels. 2015-03-17 20:07:06 +00:00
COFF [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
Disassembler Add a bunch of CHECK missing colons in tests. NFC. 2015-03-14 01:43:57 +00:00
ELF [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
Hexagon
MachO [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
Markup
Mips [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. 2015-03-17 13:17:44 +00:00
PowerPC Add support for part-word atomics for PPC 2015-03-10 20:51:07 +00:00
R600 R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
Sparc
SystemZ [SystemZ] Support all TLS access models - MC part 2015-02-18 09:11:36 +00:00
X86 AVX-512: Added encoding tests for VPROR, VPROL instructions, 2015-03-12 07:28:41 +00:00