llvm-6502/test/CodeGen
Nadav Rotem d0696ef8c3 In some cases, due to scheduling constraints we copy the EFLAGS.
The only way to read the eflags is using push and pop. If we don't
adjust the stack then we run over the first frame index. This is
not something that we want to do, so we have to make sure that
our machine function does not copy the flags. If it does then
we have to emit the prolog that adjusts the stack.

rdar://12896831



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21 23:48:49 +00:00
..
ARM Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 2012-12-20 21:09:38 +00:00
CPP
Generic After reducing the size of an operation in the DAG we zero-extend the reduced 2012-12-19 07:39:08 +00:00
Hexagon
MBlaze
Mips Add test case for r170674 2012-12-21 00:55:10 +00:00
MSP430
NVPTX
PowerPC Simplify the testcase a bit. 2012-12-20 17:47:27 +00:00
R600 R600: Expand vec4 INT <-> FP conversions 2012-12-21 16:33:24 +00:00
SI
SPARC
Thumb
Thumb2 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 2012-12-20 19:59:30 +00:00
X86 In some cases, due to scheduling constraints we copy the EFLAGS. 2012-12-21 23:48:49 +00:00
XCore