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https://github.com/c64scene-ar/llvm-6502.git
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3ef392c4e2
Use FMOVWSr/FMOVXDr instead of FMOVSr/FMOVDr, which have the proper register class to be used with the zero register. This makes the MachineInstruction verifier happy again. This is related to <rdar://problem/18027157>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216040 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.0 KiB
LLVM
42 lines
1.0 KiB
LLVM
; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
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; Materialize using fmov
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define float @fmov_float1() {
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; CHECK-LABEL: fmov_float1
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; CHECK: fmov s0, #1.25000000
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ret float 1.250000e+00
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}
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define float @fmov_float2() {
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; CHECK-LABEL: fmov_float2
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; CHECK: fmov s0, wzr
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ret float 0.0e+00
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}
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define double @fmov_double1() {
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; CHECK-LABEL: fmov_double1
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; CHECK: fmov d0, #1.25000000
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ret double 1.250000e+00
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}
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define double @fmov_double2() {
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; CHECK-LABEL: fmov_double2
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; CHECK: fmov d0, xzr
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ret double 0.0e+00
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}
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; Materialize from constant pool
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define float @cp_float() {
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; CHECK-LABEL: cp_float
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; CHECK: adrp [[REG:x[0-9]+]], {{lCPI[0-9]+_0}}@PAGE
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; CHECK-NEXT: ldr s0, {{\[}}[[REG]], {{lCPI[0-9]+_0}}@PAGEOFF{{\]}}
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ret float 0x400921FB60000000
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}
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define double @cp_double() {
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; CHECK-LABEL: cp_double
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; CHECK: adrp [[REG:x[0-9]+]], {{lCPI[0-9]+_0}}@PAGE
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; CHECK-NEXT: ldr d0, {{\[}}[[REG]], {{lCPI[0-9]+_0}}@PAGEOFF{{\]}}
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ret double 0x400921FB54442D18
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}
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