llvm-6502/lib
Tom Stellard b48c8c49d5 R600/SI: Adjsut SGPR live ranges before register allocation
SGPRs are written by instructions that sometimes will ignore control flow,
which means if you have code like:

if (VGPR0) {
  SGPR0 = S_MOV_B32 0
} else {
  SGPR0 = S_MOV_B32 1
}

The value of SGPR0 will 1 no matter what the condition is.

In order to deal with this situation correctly, we need to view the
program as if it were a single basic block when we calculate the
live ranges for the SGPRs.  They way we actually update the live
range is by iterating over all of the segments in each LiveRange
object and setting the end of each segment equal to the start of
the next segment.  So a live range like:

[3888r,9312r:0)[10032B,10384B:0)  0@3888r

will become:

[3888r,10032B:0)[10032B,10384B:0)  0@3888r

This change will allow us to use SALU instructions within branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212215 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:48 +00:00
..
Analysis Suppress inlining when the block address is taken 2014-07-01 00:19:34 +00:00
AsmParser IR: Add COMDATs to the IR 2014-06-27 18:19:56 +00:00
Bitcode IR: Add COMDATs to the IR 2014-06-27 18:19:56 +00:00
CodeGen DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself. 2014-07-02 18:32:05 +00:00
DebugInfo
ExecutionEngine ExecutionEngine::create(): fix interpreter fallback when JIT is unavailable 2014-07-01 03:18:49 +00:00
IR DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself. 2014-07-02 18:32:05 +00:00
IRReader
LineEditor
Linker Include <tuple> to make buildbots happy 2014-06-27 18:38:12 +00:00
LTO Use a range loop. No functionality change. 2014-06-28 18:44:59 +00:00
MC Fix configure+make build. 2014-07-02 20:05:48 +00:00
Object Speculatively fix some code handling Power64 MachO files 2014-06-30 20:12:59 +00:00
Option
ProfileData
Support Remove obsolete function TargetRegistry::getClosestTargetForJIT() 2014-07-01 10:47:13 +00:00
TableGen
Target R600/SI: Adjsut SGPR live ranges before register allocation 2014-07-02 20:53:48 +00:00
Transforms Remove non-static field initializer to appease MSVC 2014-07-02 20:25:42 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile