llvm-6502/test/Assembler/2002-04-07-HexFloatConstants.ll
Dan Gohman ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00

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LLVM

; This testcase checks to make sure that the assembler can handle floating
; point constants in IEEE hex format. This also checks that the disassembler,
; when presented with a FP constant that cannot be represented exactly in
; exponential form, outputs it correctly in hex format. This is a distillation
; of the bug that was causing the Olden Health benchmark to output incorrect
; results!
;
; RUN: llvm-as < %s | opt -constprop | llvm-dis > %t.1
; RUN: llvm-as < %s | llvm-dis | llvm-as | opt -constprop | \
; RUN: llvm-dis > %t.2
; RUN: diff %t.1 %t.2
define double @test() {
%tmp = fmul double 7.200000e+101, 0x427F4000 ; <double> [#uses=1]
ret double %tmp
}