llvm-6502/test/MC
Rafael Espindola b4b0b34181 Write relocation sections contiguously.
Linkers normally read all the relocations upfront to compute the references
between sections. Putting them together is a bit more cache friendly.

I benchmarked linking a Release+Asserts clang with gold on a vm. I tried all
4 combinations of --gc-sections/no --gc-section hot and cold cache.

I cleared the cache with

echo 3 > /proc/sys/vm/drop_caches

and warmed it up by running the link once before timing the subsequent ones.

With cold cache and --gc-sections the time goes from

1.86130781665 +- 0.01713126697463843 seconds
to
1.82370735105 +- 0.014127522318814516 seconds

With cold cache and no --gc-sections the time goes from

1.6087245435500002 +- 0.012999066825178644 seconds
to
1.5687122041500001 +- 0.013145850126026619 seconds

With hot cache and no --gc-sections the time goes from

0.926200939 ( +-  0.33% ) seconds
to
0.907200079 ( +-  0.31% ) seconds

With hot cache and gc sections the time goes from

1.183038049 ( +-  0.34% ) seconds
to
1.147355862 ( +-  0.39% ) seconds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 08:11:38 +00:00
..
AArch64 [AArch64] Add v8.1a "Virtualization Host Extensions" 2015-04-16 15:38:58 +00:00
ARM Write relocation sections contiguously. 2015-04-17 08:11:38 +00:00
AsmParser Add support for .ifnes psuedo-op. 2015-03-18 14:20:54 +00:00
COFF [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
Disassembler [AArch64] Add v8.1a "Virtualization Host Extensions" 2015-04-16 15:38:58 +00:00
ELF Write relocation sections contiguously. 2015-04-17 08:11:38 +00:00
Hexagon Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
MachO MC: For variable symbols, maintain MCSymbol::Section as a cache. 2015-04-03 01:46:11 +00:00
Markup
Mips [mips] [IAS] Preserve microMIPS label marking for objects when assigning. 2015-04-16 13:37:32 +00:00
PowerPC Update tests to not be as dependent on section numbers. 2015-04-15 15:59:37 +00:00
R600 R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
X86 [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00